- 您现在的位置：买卖IC网 > PDF目录170654 > DAC5687IPZPG4 (TEXAS INSTRUMENTS INC) PARALLEL, WORD INPUT LOADING, 0.0104 us SETTLING TIME, 16-BIT DAC, PQFP100 PDF资料下载
参数资料
| 型号： | DAC5687IPZPG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 0.0104 us SETTLING TIME, 16-BIT DAC, PQFP100 |
| 封装： | GREEN, PLASTIC, HTQFP-100 |
| 文件页数： | 62/79页 |
| 文件大小： | 2490K |
| 代理商： | DAC5687IPZPG4 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页当前第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页
www.ti.com
Schematic and Layout Recommendations
Application Examples
Application Example: Real IF Radio
SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006
First, the location of the spurious signal is found for the X2 real output in Figure 70(b). One spurious signal is
present in the range 0 to 0.5
× f
fDAC/2 is 47 dBc. From Figure 75, the amplitude adjustment factor for fSIG = 0.175 × fDAC is estimated at ~6 dB,
and so the fDAC/2 spurious signal is adjusted to 53 dBc.
Table 17. Example # 2 for Calculating Spurious Signals
Spurious
Frequency
Frequency/fDAC
Raw Amplitude (dBc)
Adjusted Amplitude (dBc)
Signal
(MHz)
fDAC/2
0.325
130
47
53
The DAC5687 clock is sensitive to fast transitions of input data on pins DA0, DA1, and DA2 (55, 54, and 53) due
to coupling to DVDD pin 56. The noise-like spectral energy of the DA[2:0] couples into the DAC clock resulting in
increased jitter. This significantly improves by using a 10-
resistor between DVDD and pin 56 in addition to
10-pF capacitor to DGND, as implemented on the DAC5687EVM (see the DAC5687 EVM user's guide,
SLWU017). Pin 56 draws only approximately 2 mA of current and the 0.02-V voltage drop across the resistor is
acceptable for DVDD voltages within the MINIMUM and MAXIMUM specifications. It is also recommended that
the transition rate of the input lines be slowed by inserting series resistors near the data source. The optimized
value of the series resistor depends on the capacitance of the trace between the series resistor and DAC5687
input pin. For a 2–3-inch trace, a 22-
to 47- resistor is recommended.
The effect of DAC clock jitter on the DAC output signal is worse for signals at higher signal frequencies. For low
IF (< 75 MHz) or baseband signals, there is little degradation of the output signal. However, for high IF (> 75
MHz) the DAC clock jitter may result in an elevated noise floor, which often appears as broad humps in the DAC
output spectrum. It is recommended for signals above 75 MHz that the inputs to DA0 and DA1, which are the two
LSBs if input DA[15:0] is not reversed, not be connected to input data to prevent coupling to the DAC rate clock.
The decrease in resolution to 14 bits and increase in quantization noise does not significantly affect the
DAC5687 SNR for signals > 75 MHz.
An system example of the DAC5687 used for a flexible real IF radio is shown in Figure 76. A complex baseband
input to the DAC would be generated by a digital upconverter such as Texas Instruments GC4116, GC5016, or
GC5316. The DAC5687 would be used to increase the data rate through interpolation and flexibly place the
output signal using the FMIX and/or CMIX blocks. Although the DAC5687 X4 mode is shown, any of the modes
(X2, X4L, or X8) would be appropriate.
Copyright 2005–2006, Texas Instruments Incorporated
65
Product Folder Link(s): DAC5687
相关PDF资料 |
PDF描述 |
|---|---|
| DAC5688IRGCTG4 | PARALLEL, WORD INPUT LOADING, 0.0104 us SETTLING TIME, 16-BIT DAC, PQCC64 |
| DAC702LH | PARALLEL, WORD INPUT LOADING, 4 us SETTLING TIME, 16-BIT DAC, CDIP24 |
| DAC7545KUG4 | PARALLEL, WORD INPUT LOADING, 2 us SETTLING TIME, 12-BIT DAC, PDSO20 |
| DAC7545JP | PARALLEL, WORD INPUT LOADING, 2 us SETTLING TIME, 12-BIT DAC, PDIP20 |
| DAC7545KP | PARALLEL, WORD INPUT LOADING, 2 us SETTLING TIME, 12-BIT DAC, PDIP20 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DAC5687IPZPR | 功能描述:数模转换器- DAC 16-bit 500 MSPS 2-8x Interpolat’g Dual-Ch RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| DAC5687IPZPRG4 | 功能描述:数模转换器- DAC 16-bit 500 MSPS 2-8x Interpolat’g Dual-Ch RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| DAC5687MPZPEP | 功能描述:数模转换器- DAC 16B 500Msps 2X-8X Interp 2-Channel DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| DAC5688 | 制造商:TI 制造商全称:Texas Instruments 功能描述:DUAL-CHANNEL, 16-BIT, 800 MSPS, 2x-8x INTERPOLATING DIGITAL-TO-ANALOG CONVERTER (DAC) |
| DAC5688_10 | 制造商:TI 制造商全称:Texas Instruments 功能描述:DUAL-CHANNEL, 16-BIT, 800 MSPS, 2x-8x INTERPOLATING DIGITAL-TO-ANALOG CONVERTER (DAC) |
发布紧急采购，3分钟左右您将得到回复。