参数资料
型号: DS2152L+
厂商: Maxim Integrated Products
文件页数: 36/97页
文件大小: 0K
描述: IC TXRX T1 1CHIP ENHNCD 100-LQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 90
功能: 单芯片收发器
接口: T1
电路数: 1
电源电压: 4.75 V ~ 5.25 V
电流 - 电源: 75mA
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 100-LQFP
供应商设备封装: 100-LQFP(14x14)
包装: 管件
包括: DSX-1 和 CSU 线路补偿发生器,HDLC 控制器,带内回路代码发生器和检测器
产品目录页面: 1429 (CN2011-ZH PDF)
DS2152
41 of 97
6.2 Path Code Violation Count Register (PCVCR)
When the receive side of the DS2152 is set to operate in the ESF framing mode (CCR2.3 = 1), PCVCR
will automatically be set as a 12-bit counter that will record errors in the CRC6 codewords. When set to
operate in the D4 framing mode (CCR2.3 = 0), PCVCR will automatically count errors in the Ft framing
bit position. Via the RCR2.1 bit, the DS2152 can be programmed to also report errors in the Fs framing
bit position. The PCVCR will be disabled during receive loss of synchronization (RLOS=1) conditions.
See Table 6-2 for a detailed description of exactly what errors the PCVCR counts.
PCVCR1: PATH VIOLATION COUNT REGISTER 1 (Address = 25 Hex)
PCVCR2: PATH VIOLATION COUNT REGISTER 2 (Address = 26 Hex)
(MSB)
(LSB)
(Note 1)
CRC/FB11
CRC/FB10
CRC/FB9
CRC/FB8
PCVCR1
CRC/FB7
CRC/FB6
CRC/FB5
CRC/FB4
CRC/FB3
CRC/FB2
CRC/FB1
CRC/FB0
PCVCR2
SYMBOL
POSITION NAME AND DESCRIPTION
CRC/FB11
PCVCR1.3
MSB of the 12-Bit CRC6 Error or Frame Bit Error Count (Note 2)
CRC/FB0
PCVCR2.0
LSB of the 12-Bit CRC6 Error or Frame Bit Error Count (Note 2)
Note 1: The upper nibble of the counter at address 25 is used by the Multiframes Out of Sync Count Register.
Note 2: PCVCR counts either errors in CRC codewords (in the ESF framing mode; CCR2.3 = 1) or errors in the framing bit position (in the
D4 framing mode; CCR2.3 = 0).
Table 6-2. Path Code Violation Counting Arrangements
FRAMING MODE
(CCR2.3)
COUNT Fs ERRORS?
(RCR2.1)
WHAT IS COUNTED IN THE
PCVCRs
D4
No
Errors in the Ft pattern
D4
Yes
Errors in both the Ft and Fs patterns
ESF
Don’t Care
Errors in the CRC6 codewords
6.3 Multiframes Out of Sync Count Register (MOSCR)
Normally, the MOSCR is used to count the number of multiframes that the receive synchronizer is out of
sync (RCR2.0 = 1). This number is useful in ESF applications needing to measure the parameters Loss Of
Frame Count (LOFC) and ESF Error Events as described in AT&T publication TR54016. When the
MOSCR is operated in this mode, it is not disabled during receive loss of synchronization (RLOS = 1)
conditions. The MOSCR has alternate operating mode whereby it will count either errors in the Ft
framing pattern (in the D4 mode) or errors in the FPS framing pattern (in the ESF mode). When the
MOSCR is operated in this mode, it is disabled during receive loss of synchronization (RLOS = 1)
conditions. See Table 6-3 for a detailed description of what the MOSCR is capable of counting.
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