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| 型号： | DS2152L+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 5/97页 |
| 文件大小： | 0K |
| 描述： | IC TXRX T1 1CHIP ENHNCD 100-LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 90 |
| 功能： | 单芯片收发器 |
| 接口： | T1 |
| 电路数： | 1 |
| 电源电压： | 4.75 V ~ 5.25 V |
| 电流 - 电源： | 75mA |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-LQFP |
| 供应商设备封装： | 100-LQFP（14x14） |
| 包装： | 管件 |
| 包括： | DSX-1 和 CSU 线路补偿发生器，HDLC 控制器，带内回路代码发生器和检测器 |
| 产品目录页面： | 1429 (CN2011-ZH PDF) |
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DS2152
13 of 97
PIN
NAME
FUNCTION
99
RLOS/LOTC
Receive Loss of Sync/Loss of Transmit Clock. A dual function output that is
controlled by the CCR3.5 control bit. This pin can be programmed to either toggle high
when the synchronizer is searching for the frame and multiframe or to toggle high if the
TCLK pin has not been toggled for 5
s.
6
RCL
Receive Carrier Loss. Set high when the line interface detects a loss of carrier.
93
RSIGF
Receive Signaling Freeze. Set high when the signaling data is frozen via either
automatic or manual intervention. Used to alert downstream equipment of the condition.
3
8MCLK
8MHz Clock. A 8.192MHz output clock that is referenced to the clock that is output at
the RCLK pin and is used to clock data through the receive side framer.
91
RPOSO
Receive Positive Data Output. Updated on the rising edge of RCLKO with the bipolar
data out of the line interface. This pin is normally tied to RPOSI.
90
RNEGO
Receive Negative Data Output. Updated on the rising edge of RCLKO with the bipolar
data out of the line interface. This pin is normally tied to RNEGI.
89
RCLKO
Receive Clock Output. Buffered recovered clock from the T1 line. This pin is normally
tied to RCLKI.
86
RPOSI
Receive Positive Data Input. Sampled on the falling edge of RCLKI for data to be
clocked through the receive side framer. RPOSI and RNEGI can be tied together for a
NRZ interface. Can be internally connected to RPOSO by tying the LIUC pin high.
87
RNEGI
Receive Negative Data Input. Sampled on the falling edge of RCLKI for data to be
clocked through the receive side framer. RPOSI and RNEGI can be tied together for a
NRZ interface. Can be internally connected to RNEGO by tying the LIUC pin high.
88
RCLKI
Receive Clock Input. Clock used to clock data through the receive side framer. This pin
is normally tied to RCLKO. Can be internally connected to RCLKO by tying the LIUC
pin high.
2.3 Parallel Control Port Pins
PIN
NAME
FUNCTION
25
INT
Interrupt. Flags host controller during conditions and change of conditions defined in
the Status Registers 1 and 2 and the FDL Status Register. Active-low, open-drain
output.
14
TEST
Tri-State Control. Set high to tri-state all output and I/O pins (including the parallel
control port). Set low for normal operation. Useful in board-level testing.
55
MUX
Bus Operation. Set low to select nonmultiplexed bus operation. Set high to select
multiplexed bus operation.
56–65
D0–D7/
AD0–AD7
Data Bus or Address/Data Bus. In nonmultiplexed bus operation (MUX = 0), serves as
the data bus. In multiplexed bus operation (MUX = 1), serves as an 8-bit multiplexed
address/data bus.
66–72
A0–A6
Address Bus. In nonmultiplexed bus operation (MUX = 0), serves as the address bus. In
multiplexed bus operation (MUX = 1), these pins are not used and should be tied low.
11
BTS
Bus Type Select. Strap high to select Motorola bus timing; strap low to select Intel bus
timing. This pin controls the function of the RD ( DS ), ALE(AS), and WR (R/ W ) pins.
If BTS = 1, then these pins assume the function listed in parentheses.
74
RD(DS)
Read Input (Data Strobe). RD and DS are active-low signals when MUX = 1. DS is
active high when MUX = 0. See bus timing diagrams.
75
CS
Chip Select. Must be low to read or write to the device. CS is an active-low signal.
73
ALE(AS)
A7 or Address Latch Enable (Address Strobe). In non-multiplexed bus operation
(MUX = 0), serves as the upper address bit. In multiplexed bus operation (MUX = 1),
serves to demultiplex the bus on a positive-going edge.
77
WR(R/W)
Write Input (Read/Write). WR is an active-low signal.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2152L+ | 功能描述:网络控制器与处理器 IC Enhanced T1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS2152L-ES | 制造商:DALL 功能描述: |
| DS2152LN | 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS2152LN+ | 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS2153DK | 功能描述:KIT DESIGN TXRX E1 DS2153 RoHS:否 类别:编程器，开发系统 >> 过时/停产零件编号 系列:- 标准包装:1 系列:- 传感器类型:CMOS 成像，彩色（RGB） 传感范围:WVGA 接口:I²C 灵敏度:60 fps 电源电压:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相关产品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
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