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参数资料
| 型号： | DS21Q59DK |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 16/76页 |
| 文件大小： | 0K |
| 描述： | KIT DESIGN FOR DS21Q59 |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1 |
| 主要目的： | 电信，调帧器和线路接口装置（LIU） |
| 已用 IC / 零件： | DS21Q59 |
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DS21Q59 Quad E1 Transceiver
23 of 76
8.5 Local Loopback
When CCR4.6 is set to 1, the DS21Q59 is forced into local loopback (LLB) mode. In this loopback, data continues
to be transmitted as normal. Data being received at RTIP and RRING is replaced with the data being transmitted.
Data in this loopback passes through the jitter attenuator (Figure 3-1).
Register Name:
CCR4
Register Description:
Common Control Register 4
Register Address:
15 Hex
Bit #
7
6
5
4
3
2
1
0
Name
LIRST
RESA
RESR
RCM4
RCM3
RCM2
RCM1
RCM0
NAME
BIT
FUNCTION
LIRST
7
Line Interface Reset. Setting this bit from 0 to 1 initiates an internal reset
that affects the clock recovery state machine and jitter attenuator.
Normally this bit is only toggled on power-up. It must be cleared and set
again for a subsequent reset.
RESA
6
Receive Elastic Store Align. Setting this bit from 0 to 1 may force the
receive elastic store’s write/read pointers to a minimum separation of half
a frame. No action is taken if the pointer separation is already greater
than or equal to half a frame. If pointer separation is less than half a
frame, the command is executed and data is disrupted. This bit should be
toggled after SYSCLK has been applied and is stable. It must be cleared
and set again for a subsequent align. See Section 18 for details.
RESR
5
Receive Elastic Store Reset. Setting this bit from 0 to 1 forces the
receive elastic store to a depth of one frame. Receive data is lost during
the reset. The bit should be toggled after SYSCLK has been applied and
is stable. It must be cleared and set again for a subsequent reset. See
Section 18 for details.
RCM4
4
Receive Channel Monitor Bit 4. MSB of a channel decode that
determines which receive channel data appears in the RDS0M register.
See Section 10 for details.
RCM3
3
Receive Channel Monitor Bit 3
RCM2
2
Receive Channel Monitor Bit 2
RCM1
1
Receive Channel Monitor Bit 1
RCM0
0
Receive Channel Monitor Bit 0. LSB of the channel decode.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS21Q59L | 功能描述:网络控制器与处理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS21Q59L+ | 功能描述:网络控制器与处理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS21Q59LN | 功能描述:网络控制器与处理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS21Q59LN+ | 功能描述:网络控制器与处理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS21S07A | 制造商:Maxim Integrated Products 功能描述: |
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