收藏本站
参数资料
型号： DS21Q59DK
厂商： Maxim Integrated Products
文件页数： 34/76页
文件大小： 0K
描述： KIT DESIGN FOR DS21Q59
产品培训模块： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装： 1
主要目的： 电信，调帧器和线路接口装置（LIU）
已用 IC / 零件： DS21Q59
DS21Q59 Quad E1 Transceiver
4 of 76
LIST OF FIGURES
Figure 3-1. Block Diagram ....................................................................................................................... 7
Figure 6-1. Serial Port Operation Mode 1 ...............................................................................................14
Figure 6-2. Serial Port Operation Mode 2 ...............................................................................................15
Figure 6-3. Serial Port Operation Mode 3 ...............................................................................................15
Figure 6-4. Serial Port Operation Mode 4 ...............................................................................................15
Figure 21-1. External Analog Connections (Basic Configuration) ...........................................................48
Figure 21-2. External Analog Connections (Protected Interface) ............................................................49
Figure 21-3. Transmit Waveform Template ............................................................................................50
Figure 21-4. Jitter Tolerance...................................................................................................................51
Figure 21-5. Jitter Attenuation ................................................................................................................51
Figure 22-1. CMI Coding ........................................................................................................................52
Figure 22-2. Example of CMI Code Violation (CV)..................................................................................53
Figure 23-1. IBO Configuration Using Two DS21Q59 Transceivers (Eight E1 Lines)..............................55
Figure 24-1. Receive Frame and Multiframe Timing ...............................................................................56
Figure 24-2. Receive Boundary Timing (With Elastic Store Disabled).....................................................56
Figure 24-3. Receive Boundary Timing (With Elastic Store Enabled) .....................................................56
Figure 24-4. Receive Interleave Bus Operation ......................................................................................57
Figure 24-5. Transmit Frame and Multiframe Timing ..............................................................................58
Figure 24-6. Transmit Boundary Timing..................................................................................................58
Figure 24-7. Transmit Interleave Bus Operation .....................................................................................59
Figure 24-8. Framer Synchronization Flowchart .....................................................................................60
Figure 24-9. Transmit Data Flow ............................................................................................................61
Figure 26-1. Intel Bus Read AC Timing (PBTS = 0)................................................................................64
Figure 26-2. Intel Bus Write Timing (PBTS = 0)......................................................................................64
Figure 26-3. Motorola Bus AC Timing (PBTS = 1) ..................................................................................65
Figure 26-4. Intel Bus Read Timing (PBTS = 0)......................................................................................66
Figure 26-5. Intel Bus Write Timing (PBTS = 0)......................................................................................67
Figure 26-6. Motorola Bus Read Timing (PBTS = 1)...............................................................................67
Figure 26-7. Motorola Bus Write Timing (PBTS = 1)...............................................................................67
Figure 26-8. Serial Bus Timing (BTS1 = 1, BTS0 = 0) ............................................................................68
Figure 26-9. Receive AC Timing (Receive Elastic Store Disabled) .........................................................70
Figure 26-10. Receive AC Timing (Receive Elastic Store Enabled) ........................................................71
Figure 22-11. Transmit AC Timing (IBO Disabled)..................................................................................73
Figure 22-12. Transmit AC Timing (IBO Enabled) ..................................................................................74
Figure 26-13. NRZ Input AC Timing .......................................................................................................74
相关PDF资料
PDF描述
RCM28DCTH CONN EDGECARD 56POS DIP .156 SLD
EET-ED2D152EA CAP ALUM 1500UF 200V 20% SNAP
RCM28DCTD CONN EDGECARD 56POS DIP .156 SLD
PLE0G681MDO1 CAP ALUM 680UF 4V 20% RADIAL
PLE0E561MCO1 CAP ALUM 560UF 2.5V 20% RADIAL
相关代理商/技术参数
参数描述
DS21Q59L 功能描述:网络控制器与处理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS21Q59L+ 功能描述:网络控制器与处理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS21Q59LN 功能描述:网络控制器与处理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS21Q59LN+ 功能描述:网络控制器与处理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS21S07A 制造商:Maxim Integrated Products 功能描述:
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*