参数资料
型号: DS33ZH11+
厂商: Maxim Integrated Products
文件页数: 102/172页
文件大小: 0K
描述: IC MAPPER ETHERNET 100CSBGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 7
应用: 数据传输
接口: 串行
电源电压: 1.8V,2.5V,3.3V
封装/外壳: 100-LFBGA,CSPBGA
供应商设备封装: 100-CSBGA(10x10)
包装: 托盘
安装类型: 表面贴装
DS33Z11 Ethernet Mapper
35 of 172
8.5 Initialization and Configuration
EXAMPLE DEVICE INITIALIZATION SEQUENCE:
STEP 1: Apply 3.3V supplies, then apply 1.8V supplies.
STEP 2: Reset the device by pulling the
RST pin low or by using the software reset bits outlined in Section 8.4.
Clear all reset bits. Allow 5 milliseconds for the reset recovery.
STEP 3: Check the Device ID in the GL.IDRL and GL.IDRH registers.
STEP 4: Configure the system clocks. Allow the clock system to properly adjust.
STEP 5: Initialize the entire remainder of the register space with 00h (or otherwise if specifically noted in the
register’s definition), including the reserved bits and reserved register locations.
STEP 6: Write FFFFFFFFh to the MAC indirect addresses 010Ch through 010Fh.
STEP 7: Setup connection in the GL.CON1 register.
STEP 8: Configure the Serial Port register space as needed.
STEP 9: Configure the Ethernet Port register space as needed.
STEP 10: Configure the Ethernet MAC indirect registers as needed.
STEP 11: Configure the external Ethernet PHY through the MDIO interface.
STEP 12: Clear all counters and latched status bits.
STEP 13: Set the queue size in the Arbiter and reset the queue pointers for the Ethernet and Serial interfaces.
STEP 14: Enable Interrupts as needed.
STEP 15: Begin handling interrupts and latched status events.
8.6 Global Resources
In order to maintain software compatibility with the multiport devices in the product family, a set of Global registers
are located at 0F0h-0FFh. The global registers include Global resets, global interrupt status, interrupt masking,
clock configuration, and the Device ID registers. See the Global Register Definitions in Table 9-2.
8.7 Per-Port Resources
Multi-port devices in this product family share a common set of global registers, BERT, and Arbiter. All other
resources are per-port.
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