参数资料
型号: DS33ZH11+
厂商: Maxim Integrated Products
文件页数: 150/172页
文件大小: 0K
描述: IC MAPPER ETHERNET 100CSBGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 7
应用: 数据传输
接口: 串行
电源电压: 1.8V,2.5V,3.3V
封装/外壳: 100-LFBGA,CSPBGA
供应商设备封装: 100-CSBGA(10x10)
包装: 托盘
安装类型: 表面贴装
DS33Z11 Ethernet Mapper
79 of 172
Register Name:
GL.BIS
Register Description:
Global BERT Interrupt Status
Register Address:
0Dh
Bit #
7
6
5
4
3
2
1
0
Name
-
BIS
Default
0
Bit 0: BERT Interrupt Status (BIS) This bit is set to 1 if the BERT has an enabled interrupt generating event.
Register Name:
GL.CON1
Register Description:
Connection Register for Ethernet Interface 1
Register Address:
0Eh
Bit #
7
6
5
4
3
2
1
0
Name
-
LINE1[0]
Default
0
1
Bit 0: LINE1[0] This bit is preserved to provide software compatibility with multiport devices. The LINE1[0] bit
selects the Ethernet port that is to be connected to the Serial Interface. Note that Bi-directional connection is
assumed between the Serial and Ethernet Interfaces. The connection register and corresponding queue size
must be defined for proper operation. Writing a 0 to this register will disconnect the connection. When a
connection is disconnected, “1”s are sourced to the Serial Interface transmit and to the HDLC receiver and the
clocks to the HDLC transmitter/receiver are disabled.
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