参数资料
型号: EM6640SO18B
英文描述: Advanced Synchronous Rectified Buck MOSFET Drivers with Pre-POR OVP; Temperature Range: -40°C to 85°C; Package: 10-DFN
中文描述: 微控制器
文件页数: 62/62页
文件大小: 620K
代理商: EM6640SO18B
EM6640
03/02 REV. C/446
Copyright
2002, EM Microelectronic-Marin SA
9
www.emmicroelectronic.com
4.3 Input-PortA-Reset
By writing the OptInpRSel1 and OptInpRSel2 registers it is possible to choose any combination of PortA input
values to execute a system reset. The reset condition must be valid for at least 3.4mS (2 risings edges of ck[10]
with system clock = 600kHz) in ACTIVE and STANDBY mode.
When canceling the SLEEP mode, the debouncer is not active (oscillator off). However, the reset condition
passes through an analogue filter. The constant time is defined on the section EM6640 Electrical specifications,
on page 56. In this case, the reset condition must be at least two times this constant time (In ACTIVE and
STANDBY mode, the analogue filter is inhibited). The reset is generated for the ‘CPU Reset Delay’
Bit SelInpResMod in option register OptPaRst selects which kind of input reset modes will be used: through an
″OR logic″ or an ″AND logic″ (default at power on). With the first mode, at least one input matching its reset
condition will trigger a system reset. With the second mode, it is necessary to fully match the reset combination
chosen in the registers.
Bit NoInputReset in option register OptPaRst selects the Input-PortA-Reset function in ACTIVE and STANDBY
Mode. If set to "0" (default at power on) the occurrence of the selected combination for Input-PortA-Reset will
trigger a system reset. Set to ‘1’ the Input PortA Reset function is inhibited. This option bit has no action in SLEEP
Mode, where the occurrence of the selected Input-PortA-Reset combination will always immediately trigger a
system reset.
Reset combination selection (InpReset) in registers OptInpRSel1 and OptInpRSel2.
SelinpResMod = 0 =>
InpReset = InpResPA[0] InpResPA[1] InpResPA[2] InpResPA[3]
SelinpResMod = 1 =>
InpReset = InpResPA[0] + InpResPA[1] + InpResPA[2] + InpResPA[3]
SelinpResMod = 0
Figure 8.Input PortA Reset structure
0InpRes1PA[
n]
InpRes2PA[n] InpResPA[n]
0
VSS
0
1
PA[n]
1
0
not PA[n]
11VDD
n = 0 to 3
i.e. ; - No reset if InpResPA[n] = VSS.
- With InpResPA[n] = VDD, concerning
terminal [n] inhibited.
- Always Reset if InpResPA[3:0] = 'b1111.
SelinpResMod = 1
InpRes1PA[n] InpRes2PA[n] InpResPA[n]
0
VSS
0
1
PA[n]
1
0
not PA[n]
11VDD
n = 0 to 3
i.e. ; - No reset if InpResPA[3:0] = 'b0000.
- With InpResPA[n] = VSS, concerning
terminal [n] inhibited.
- Always Reset if InpResPA[n] = VDD.
0
1 MUX
2
3 1 0
VSS
PA[3]
VDD
BIT
[0]
BIT
[1]
BIT
[2]
BIT
[3]
InpResPA[3]
InpRes2PA[3]
InpRes1PA[3]
Input PortA Reset
Bit[2] selection
Input PortA Reset
Bit[1] selection
Input PortA Reset
Bit[0] selection
Input PortA Reset
Bit[3] selection
InpResPA
Input
Reset
from
PortA
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