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| 型号： | EVAL-AD7280AEDZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 26/48页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD7280 |
| 标准包装： | 1 |
| 主要目的： | 电源管理，电池监控器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | * |
| 主要属性： | * |
| 次要属性： | SPI 接口 |
| 已供物品： | 板 |
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AD7280A
An example of how damage to the external transistors can occur
is a connection sequence that first provides the system ground
(the ground supply to the master AD7280A in the daisy chain)
followed by a connection from any of the battery cells at a
potential high enough to exceed the V GS of the cell balancing
transistor, for example 40 V. If these two connections are the
first battery connections made in the system, the result is 40 V
being applied to one of the VINx pins of the AD7280A through
a series resistor. The 40 V battery connection is also directly
applied to the source input of one of the cell balancing transistors.
However, because no power has been supplied to the V DD pin of
Programming the Cell Balance Timers
It is recommended that the required CBx timer values be
programmed to each individual CBx timer register before
activating the CB counter. Changing the CBx timer values while
the counter is running is possible; however, writing to an active
CBx timer register resets the counter, as described in the Cell
Cell Balance Timer Example 1
The following sequence of steps programs a value of 214.5 sec
to the CB1 and CB2 timer registers.
the AD7280A, all the CBx outputs are at 0 V. This results in a
reverse voltage of 40 V across the V GS of the external transistor,
which can damage the device.
Cell Balance Timers
The AD7280A offers six cell balance timer registers that allow
the on time of each CBx output to be programmed. The CBx
1.
2.
3.
4.
5.
Set Bits[D4:D3] of the CB1 timer register and the CB2
timer register high.
Set Bits[D3:D2] of the cell balance register high.
Wait 60 sec.
Set Bits[D4:D3] of the CB3 timer register high.
Set Bits[D4:D2] of the cell balance register high.
timers can be set to a value from 0 minutes to 36.9 minutes. The
resolution of the CBx timers is 71.5 sec. A value of 0x00 in a
CBx timer register means that the timer is not activated. A non-
zero value programmed to a CBx timer register configures the
CBx timer for use, but the CBx outputs and the CBx timers are
not activated until the cell balance register is written to. At the
end of the individually programmed CBx time, the respective
CBx output returns to its default state of 0 V output with respect
to the absolute amplitude of the negative terminal of the battery
cell that is being balanced. Also at this time, the cell balance
register is reset and the CBx timer registers continue to hold
their programmed values. The default value of the CBx timer
registers on power-up is 0x00.
When using the cell balance timer feature, note that the timer on
each cell balance output is operated from a single CB counter.
When a nonzero value is programmed to any CBx timer register,
this counter is activated by writing a nonzero value to the cell
balance register. The current value of the counter is compared
to the values programmed to each CBx timer register at 4.5 sec
intervals (71.5 sec/16). When the value in the counter reaches
the value in the CBx timer register, the cell balance output
corresponding to that CBx timer register is switched off. Note
that the cell balance register has a higher priority than the CBx
timer registers. A CBx output can be switched off by writing to
the cell balance register even if the value programmed to the
respective CBx timer register has not expired.
Writing a zero or a nonzero value to an active CBx timer
In this example, the CB1 and CB2 outputs are switched on and
the cell balance counter is activated. Following the 60 sec wait,
a value of 214.5 sec is written to the CB3 timer register, the CB3
output is switched on, and the on state of the CB1 and CB2
outputs is maintained. In this example, all three CB outputs are
switched off at the same time (214.5 sec). This is because the CB
counter was already active before the CB3 timer register was
programmed and the CB3 output selected.
Cell Balance Timer Example 2
In this example, follow the same sequence of steps described in
the Cell Balance Timer Example 1 section, but increase the wait
step from 60 sec to any value greater than 214.5 sec.
The initial steps set up the CB1 and CB2 timers and activate the
CB1 and CB2 outputs. However, because the wait state is now
longer than the time programmed to the CB1 and CB2 timers,
the CB1 and CB2 timers expire before the additional writes to
configure CB3. The CB1 and CB2 outputs switch off, a 0 is
written to Bits[D3:D2] of the cell balance register, and the CB
counter is reset to 0x00 before the commands to program the
CB3 timer and to switch on the CB3 output are received.
In this example, the second write to the cell balance registers—
which selects the CB1, CB2, and CB3 outputs—is considered a
new activation of the CB counter. The CB1, CB2, and CB3
outputs switch on and, if no further commands are written to
the AD7280A, all three outputs switch off 214.5 sec after this
second activation of the CB counter.
register (corresponding CB output switched on) results in the
cell balance counter being reset and automatically restarted.
Note that overwriting the CBx timer with 0 restarts the counter,
but, because the timer value is now 0, the corresponding CB
output is switched off. Any write to a nonactive CBx timer
register (corresponding CB output not switched on) has no
effect on the cell balance counter.
Rev. 0 | Page 26 of 48
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