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| 型号： | EVAL-AD7280AEDZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 31/48页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD7280 |
| 标准包装： | 1 |
| 主要目的： | 电源管理，电池监控器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | * |
| 主要属性： | * |
| 次要属性： | SPI 接口 |
| 已供物品： | 板 |
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AD7280A
PD TIMER REGISTER
The PD timer register allows the user to configure a set time
after which the AD7280A is automatically powered down. The
AD7280A allows the user to set the PD timer to a value from
0 minutes to 36.9 minutes. The resolution of the PD timer is
71.5 sec. When using the PD timer in conjunction with the CBx
timers, the value programmed to the PD timer should exceed
that programmed to the CBx timer by at least 71.5 sec because
the PD timer takes priority over the CBx timers. The default
value of the PD timer register on power-up is 0x00.
Table 17. PD Timer Register Settings
Bits Description
CNVST CONTROL REGISTER
The CNVST control register allows the user to gate the input
signal from the CNVST pin.
Bit D0 of the CNVST control register allows the user to hold the
internal CNVST signal high regardless of any external noise or
glitches on the CNVST pin. This setting can be used in noisy
environments to prevent incorrect initiation of conversions.
When using the rising edge of CS to perform a software convert
start, it is recommended that the CNVST pin be gated out by
setting Bit D0 high (see the Conversion Start Format section).
Bit D1 of the CNVST control register allows the user to open a
[D7:D3]
[D2:D0]
5-bit binary code to set the PD timer to a value
from 0 minutes to 36.9 minutes
Reserved; set to 000
window in the CNVST gate that allows a single CNVST pulse
through. The window is closed automatically following a falling
edge on the CNVST pin. To use this functionality, the user
READ REGISTER
The read register, in conjunction with Bits[D13:D12] and
Bit D0 of the control register, defines the read operations of the
AD7280A. To read back a single register from either a single
AD7280A or from a chain of AD7280A devices, the desired
register address should first be written to the read register. To
read back a series of conversion results from either a single
should write 10 to Bits[D1:D0] of the CNVST control register
immediately before each conversion start request.
The default value of the CNVST control register on power-up
is 0x00.
Table 19. CNVST Control Register Settings
Bits Bit Bit
[D7:D2] D1 D0 Description
AD7280A or from a chain of AD7280A devices, an address of
0x00 should be written to the read register. The default value of
the read register on power-up is 0x00.
000000
000000
000000
0
X
1
0
1
0
CNVST input not gated (default).
CNVST input gated.
Allow single CNVST pulse.
Table 18. Read Register Settings
Additional CNVST pulses are gated.
Bits
[D7:D2]
[D1:D0]
Description
6-bit binary address for the register to be read
Reserved; set to 00
Rev. 0 | Page 31 of 48
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| EVAL-AD7298SDZ | 功能描述:BOARD EVAL FOR AD7298 RoHS:是 类别:编程器，开发系统 >> 评估板 - 模数转换器 (ADC) 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- ADC 的数量:1 位数:12 采样率（每秒）:94.4k 数据接口:USB 输入范围:±VREF/2 在以下条件下的电源（标准）:- 工作温度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，软件 |
| EVAL-AD7298SDZ | 制造商:Analog Devices 功能描述:EVAL BOARD, AD7192 12BIT ADC |
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