参数资料
型号: EVAL-AD7280AEDZ
厂商: Analog Devices Inc
文件页数: 30/48页
文件大小: 0K
描述: BOARD EVAL FOR AD7280
标准包装: 1
主要目的: 电源管理,电池监控器
嵌入式:
已用 IC / 零件: *
主要属性: *
次要属性: SPI 接口
已供物品:
AD7280A
CELL UNDERVOLTAGE REGISTER
The cell undervoltage register determines the low voltage thresh-
old of the AD7280A. Cell voltage conversions lower than the
undervoltage threshold trigger the alert output. The AD7280A
allows the user to set the undervoltage threshold to a value from
1 V to 5 V. The resolution of the undervoltage threshold is eight
bits, that is, 16 mV. The default value of the undervoltage threshold
on power-up is 0x00 (1 V).
AUX ADC OVERVOLTAGE REGISTER
The AUX ADC overvoltage register determines the high voltage
threshold of the AD7280A auxiliary ADC inputs. Conversions
CELL BALANCE REGISTER
The cell balance register determines the status of the six cell
balance outputs. The six CBx outputs are set by writing to
Bits[D7:D2] of the cell balance register. The cell balance register
is reset by a software reset or following a hardware power-down.
The default value of the cell balance register on power-up is 0x00.
Table 15. Cell Balance Register Settings
Bits Description
D7 Set CB6 output
0 = output off
1 = output on
that exceed this threshold trigger the alert output. The AD7280A
allows the user to set the threshold to a value from 0 V to 5 V. The
resolution is eight bits, that is, 19 mV. The default value of the
auxiliary ADC overvoltage threshold on power-up is 0xFF (5 V).
AUX ADC UNDERVOLTAGE REGISTER
The AUX ADC undervoltage register determines the low voltage
threshold of the AD7280A auxiliary ADC inputs. Conversions
that are lower than this threshold trigger the alert output. The
AD7280A allows the user to set the threshold to a value from 0 V
to 5 V. The resolution is eight bits, that is, 19 mV. The default
value of the AUX ADC undervoltage threshold on power-up
is 0x00 (0 V).
ALERT REGISTER
The alert register determines the configuration of the alert
function. The alert can be configured as a static or dynamic
D6
D5
D4
D3
D2
[D1:D0]
Set CB5 output
0 = output off
1 = output on
Set CB4 output
0 = output off
1 = output on
Set CB3 output
0 = output off
1 = output on
Set CB2 output
0 = output off
1 = output on
Set CB1 output
0 = output off
1 = output on
Reserved; set to 0
signal.
CBx TIMER REGISTERS
?
?
The static signal is a high signal that is pulled low to
indicate that an overvoltage or undervoltage on a cell
or on the auxiliary ADC has occurred.
The dynamic signal is a square wave, the frequency
The CBx timer registers allow the user to program individual times
for each cell balance output. The AD7280A allows the user to set
the CBx timer to a value from 0 minutes to 36.9 minutes. The
resolution of the CBx timers is 71.5 sec. The default value of the
of which can be set to 100 Hz, 1 kHz, or 10 kHz.
When a number of AD7280As are operating in daisy-chain
mode, the selection of static or dynamic alert is set on the
AD7280A at the highest potential in the chain only. The alert
registers on the remaining AD7280As in the chain should be
programmed to pass the alert signal through the chain. Each
part passes the static or dynamic alert signal through the chain
or pulls the signal low to indicate that an overvoltage or under-
voltage on a cell or on the auxiliary ADC has occurred.
CBx timer registers on power-up is 0x00. When the CBx timer
value is set to 0x00, the CBx timer is not activated; that is, the CBx
outputs are all controlled by the contents of the cell balance
register only. For more information, see the Cell Balancing
Outputs section.
Table 16. CBx Timer Register Settings
Bits Description
[D7:D3] 5-bit binary code to set the CB timer to a value
from 0 minutes to 36.9 minutes
See Table 11 and Table 12 for more information about the alert
[D2:D0]
Reserved; set to 000
register settings. The default value of the alert register on
power-up is 0x00.
Rev. 0 | Page 30 of 48
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