参数资料
| 型号： | EVAL-ADE7763ZEB |
| 厂商： | Analog Devices Inc |
| 文件页数： | 22/56页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADE7763 |
| 标准包装： | 1 |
| 主要目的： | 电源管理，电度表/功率表 |
| 已用 IC / 零件： | ADE7763 |
| 已供物品： | 板 |
| 相关产品： | ADE7763ARSZRLDKR-ND - IC ENERGY METERING 1PHASE 20SSOP ADE7763ARSZRLCT-ND - IC ENERGY METERING 1PHASE 20SSOP ADE7763ARSZ-ND - IC ENERGY METERING 1PHASE 20SSOP ADE7763ARSZRLTR-ND - IC ENERGY METERING 1PHASE 20SSOP |
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ADE7763
Data Sheet
REFERENCE
2.42V, 1.21V, 0.6V
×1, ×2, ×4,
×8, ×16
{GAIN[4:3]}
CURRENT RMS (IRMS)
CALCULATION
V1
V1P
{GAIN[2:0]}
PGA1
ADC 1
HPF
DIGITAL
INTEGRATOR*
dt
WAVEFORM SAMPLE
REGISTER
ACTIVE AND REACTIVE
POWER CALCULATION
V1N
50Hz
CHANNEL 1
(CURRENT WAVEFORM)
DATA RANGE AFTER
INTEGRATOR (50Hz)
0.5V, 0.25V,
V1
0x1E F73C
0.125V, 62.5mV,
31.3mV, 15.6mV,
0V
0x28 51EC
0x0 0000
CHANNEL 1
(CURRENT WAVEFORM)
DATA RANGE
0x00 0000
0xEI 08C4
0x28 51EC
0xD7 AE14
ANALOG
INPUT
RANGE
ADC OUTPUT
WORD RANGE
0x00 0000
0xD7 AE14
60Hz
CHANNEL 1
(CURRENT WAVEFORM)
DATA RANGE AFTER
INTEGRATOR (60Hz)
0x19 CE08
0x00 0000
*WHEN DIGITAL INTEGRATOR IS ENABLED, FULL-SCALE OUTPUT DATA IS ATTENUATED
DEPENDING ON THE SIGNAL FREQUENCY BECAUSE THE INTEGRATOR HAS A –20dB/DECADE
FREQUENCY RESPONSE. WHEN DISABLED, THE OUTPUT IS NOT ATTENUATED FURTHER.
Figure 43. ADC and Signal Processing in Channel 1
0xE6 31F8
IRMS =
(2)
1
1
IRMS =
(3)
× ∑ I 2 ( i )
N
Channel 1 Sampling
The waveform samples may be routed to the waveform register
(MODE[14:13] = 1, 0) for the system master (MCU) to read. To
enable waveform sampling mode, set the WSMP bit (Bit 3) in
the interrupt enable register to Logic 1. The active and apparent
power as well as the energy calculation remain uninterrupted
during waveform sampling.
In waveform sampling mode, choose one of four output sample
rates using Bits 11 and 12 of the mode register (WAVSEL 1, 0).
The output sample rate can be 27.9 kSPS, 14 kSPS, 7 kSPS, or
3.5 kSPS—see the Mode Register (0X09) section. The interrupt
request output, IRQ, signals a new sample availability by going
active low. The timing is shown in Figure 44. The 24-bit wave-
form samples are transferred from the ADE7763 one byte (eight
bits) at a time, with the most significant byte shifted out first.
section. The Channel 1 waveform samples have a settling time
of approximately 150 μs. The interrupt request output IRQ stays
low until the interrupt routine reads the reset status register—
see the Interrupts section.
IRQ
SCLK
READ FROM WAVEFORM
Figure 44. Waveform Sampling Channel 1
Channel 1 RMS Calculation
The root mean square (rms) value of a continuous signal I(t) is
defined as
T
× ∫ I 2 ( t ) dt
T 0
For time sampling signals, the rms calculation involves squaring
the signal, taking the average, and obtaining the square root:
N
i = 1
rms calculation on Channel 1. The Channel 1 rms value is
processed from the samples used in the Channel 1 waveform
sampling mode. The Channel 1 rms value is stored in an
unsigned, 24-bit register (IRMS). One LSB of the Channel 1 rms
register is equivalent to 1 LSB of a Channel 1 waveform sample.
The update rate of the Channel 1 rms measurement is
CLKIN/4. The channel 1 rms measurement has a settling time
of approximately 876 ms with the integrator off and 1340 ms
with the integrator on.
DIN
DOUT
0 0 0 01 HEX
SIGN
CHANNEL 1 DATA
(24 BITS)
Rev. C | Page 22 of 56
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