参数资料
| 型号： | EVAL-ADE7763ZEB |
| 厂商： | Analog Devices Inc |
| 文件页数： | 28/56页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADE7763 |
| 标准包装： | 1 |
| 主要目的： | 电源管理，电度表/功率表 |
| 已用 IC / 零件： | ADE7763 |
| 已供物品： | 板 |
| 相关产品： | ADE7763ARSZRLDKR-ND - IC ENERGY METERING 1PHASE 20SSOP ADE7763ARSZRLCT-ND - IC ENERGY METERING 1PHASE 20SSOP ADE7763ARSZ-ND - IC ENERGY METERING 1PHASE 20SSOP ADE7763ARSZRLTR-ND - IC ENERGY METERING 1PHASE 20SSOP |
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ADE7763
Data Sheet
HPF
APOS[15:0]
24
FOR WAVEF0RM
SAMPLING
I
sgn 2 6 2 5
2 -6 2 -7 2 -8
0x1 9999
CURRENT SIGNAL – i(t)
MULTIPLIER
24
LPF2
+
+
32
FOR WAVEFORM
ACCUMULATION
V
1
INSTANTANEOUS
POWER SIGNAL – p(t)
WGAIN[11:0]
0xC CCCD
VOLTAGE SIGNAL – v(t)
0x19 999A
0x00 0000
Figure 57. Active Power Signal Processing
The ADE7763 achieves the integration of the active power
signal by continuously accumulating the active power signal in
an internal unreadable 49-bit energy register. The active energy
register (AENERGY[23:0]) represents the upper 24 bits of this
internal register. This discrete time accumulation or summation
is equivalent to integration in continuous time. Equation 14
expresses this relationship.
waveform register by setting MODE[14:13] = 0, 0 and setting
the WSMP bit (Bit 3) in the interrupt enable register to 1. Like
Channel 1 and Channel 2 waveform sampling modes, the
waveform data is available at sample rates of 27.9 kSPS, 14 kSPS,
7 kSPS, or 3.5 kSPS—see Figure 44. The active power waveform
sampling signal has a settling time of approximately 2 ms.
? ?
E ? ? p ( t ) dt ? Lim ? ? p ( nT ) ? T ?
? n ? 1 ?
?
t ? 0
where:
n is the discrete time sample number.
T is the sample period.
The discrete time sample period ( T ) for the accumulation
(14)
(sinusoidal) on the analog inputs. The three curves illustrate the
minimum time for the energy register to roll over when the active
power gain register contents are 0x7FF, 0x000, and 0x800. The
watt gain register is used to carry out power calibration. As
shown, the fastest integration time occurs when the watt gain
register is set to maximum full scale, i.e., 0x7FF.
AENERGY[23:0]
register is 1.1 μs (4/CLKIN). In addition to calculating the
0x7F FFFF
WGAIN = 0x7FF
energy, this integration removes any sinusoidal components
that might be in the active power signal.
0x3F FFFF
WGAIN = 0x000
WGAIN = 0x800
The active power signal in the waveform register is continuously
added to the internal active energy register. This addition is a
0x00 0000
4 6.2
8
12.5
TIME (minutes)
signed addition; therefore, negative energy is subtracted from
the active energy contents. The exception to this is when POAM
is selected in the MODE[15:0] register, in which case only
positive energy contributes to the active energy accumulation—
see the Positive-Only Accumulation Mode section.
The output of the multiplier is divided by WDIV. If the value in
the WDIV register is equal to 0, then the internal active energy
register is divided by 1. WDIV is an 8-bit, unsigned register.
After dividing by WDIV, the active energy is accumulated in a
49-bit internal energy accumulation register. The upper 24 bits
of this register are accessible through a read to the active energy
register (AENERGY[23:0]). A read to the RAENERGY register
returns the content of the AENERGY register, and the upper
the active power signal is accumulated in an internal 49-bit,
signed register. The active power signal can be read from the
0x40 0000
0x80 0000
Figure 58. Energy Register Rollover Time for Full-Scale Power
(Minimum and Maximum Power Gain)
Note that the energy register contents roll over to full-scale
negative (0x80 0000) and continue increasing in value when the
power or energy flow is positive—see Figure 58. Conversely, if
the power was negative, the energy register would underflow to
full-scale positive (0x7F FFFF) and continue decreasing in
value.
By using the interrupt enable register, the ADE7763 can be
configured to issue an interrupt (IRQ) when the active energy
register is more than half full (positive or negative), or when an
overflow or underflow occurs.
Rev. C | Page 28 of 56
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