参数资料
型号: IP-SLITE2
厂商: Altera
文件页数: 50/110页
文件大小: 0K
描述: IP SERIALLITE II
标准包装: 1
系列: *
类型: MegaCore
功能: SerialLite II 协议
许可证: 初始许可证
Chapter 3: Parameter Settings
Transceiver Configuration
3–27
Dynamic reconfiguration and offset cancellation for Arria II GX devices, refer to
Dynamic reconfiguration and offset cancellation for Stratix IV devices, refer to the
Stratix IV Dynamic Reconfiguration chapter in the Stratix IV Device Handbook.
Dynamic reconfiguration and using the Altera Reconfiguration Controller for
Arria V, Cyclone V, and Stratix V devices, refer to the Altera Transceiver PHY IP Core
ALTGX Support Signals
This section describes the ALTGX support signals, which are only present on variants
that use the Arria II GX and Stratix IV integrated PHY. They are connected directly to
the ALTGX instance. In many cases these signals must be shared with ALTGX
instances that are implemented in the same device. The following signals exist:
cal_blk_clk
reconfig_clk
reconfig_togxb
reconfig_fromgxb
gxb_powerdown
Table 3–11 describes these ALTGX support signals.
Table 3–11. ALTGX Support Signals
Signal
cal_blk_clk
reconfig_clk
reconfig_togxb
I/O
I
I
I
Description
The cal_blk_clk input signal is connected to the ALTGX calibration block clock
( cal_blk_clk ) input. All instances of ALTGX in the same device must have their
cal_blk_clk inputs connected to the same signal because there is only one
calibration block per device. This input should be connected to a clock operating as
recommended by the A rr ia II GX Device Ha n dbook or the S t r atix IV Device Ha n dbook .
The reconfig_clk input signal is the ALTGX dynamic reconfiguration clock. This
signal must be connected as described in the A rr ia II GX Device Ha n dbook or the
S t r atix IV Device Ha n dbook if the ALTGX dynamic reconfiguration block is used.
Otherwise, this signal must be set to 1'b0 .
The reconfig_togxb [ N :0] input signal is driven from an external dynamic
reconfiguration block. The signal supports the selection of multiple transceiver
channels for dynamic reconfiguration. This signal must be connected as described in
the A rr ia II GX Device Ha n dbook or the S t r atix IV Device Ha n dbook if the external
dynamic reconfiguration block is used. Otherwise, you must set this signal to
4'b0010 for Arria II GX and Stratix IV devices.
N value is 3 for Arria II GX and Stratix IV devices.
January 2014
Altera Corporation
SerialLite II MegaCore Function
User Guide
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