参数资料
型号: IP-SLITE2
厂商: Altera
文件页数: 91/110页
文件大小: 0K
描述: IP SERIALLITE II
标准包装: 1
系列: *
类型: MegaCore
功能: SerialLite II 协议
许可证: 初始许可证
Chapter 5: Testbench
5–5
Simulation Flow
Figure 5–4 on page 5–5 shows the testbench environment for a SerialLite II standard
broadcast mode MegaCore function with multiple SISTER instances that have one
receive and transmit port.
Figure 5–4. SerialLite II Testbench Environment, Verilog HDL Only (Standard Broadcast Mode)
SerialLite II Test b ench
Clock and
Reset
Atlantic
Interface
sl2_top
Generator
SerialLite II
High-Speed
Interface
Atlantic
Interface
AGEN_DAT_DUT
AGEN_PRI_DUT
(IP F u nctional
Sim u lation Model)
sl2_top_sister
(IP F u nctional
Sim u lation Model)
SISTER 0
AMON_DAT_SIS 0
AMON_PRI_SIS 0
AGEN_DAT_SIS 0
AGEN_PRI_SIS 0
DUT
Stat u s
Stat u s
Monitor 1 Monitor X
(SISTER (SISTER
AMON_DAT_DUT 0
AMON_DAT_DUT N-1
0 )
sl2_top_sister
0 )
AMON_DAT_SIS N-1
AMON_PRI_DUT 0
AMON_PRI_DUT N-1
(IP F u nctional
Sim u lation Model)
SISTER N-1
AMON_PRI_SIS N-1
AGEN_DAT_SIS N-1
AGEN_PRI_SIS N-1
Stat u s Stat u s
Monitor 1 Monitor X
(DUT) (DUT)
C u stom
PHY IP
Core
Stat u s Stat u s
Monitor 1 Monitor X
(SISTER (SISTER
N-1 ) N-1 )
Simulation Flow
This section describes the basic steps to use the SerialLite II testbench. The SerialLite II
testbench performs the following tests, if applicable:
The testbench waits for the main reset sequence to end.
The testbench waits for both SerialLite II links to come up (DUT and SISTER).
If the regular data port is enabled, the testbench begins to send data from the data
port Atlantic generators (DUT and SISTER side). The data Atlantic monitors check
that the first data matches the first data sent from the generators and so on, until
all the data is sent.
In Verilog HDL only, if the priority data port is enabled, the testbench begins to
send data from the priority port Atlantic generators. The priority Atlantic
monitors checks that the first priority data matches the first priority data sent from
the generator and so on, until all the data is sent.
Once all monitors receive the last packet, the testbench finishes.
You can use the SerialLite II testbench as a template for creating your own testbench
or modify it to increase the testing coverage.
January 2014
Altera Corporation
SerialLite II MegaCore Function
User Guide
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