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参数资料
| 型号： | IR3500VMTRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 16/34页 |
| 文件大小： | 0K |
| 描述： | IC XPHASE3 CTLR VR11.1 32-MLPQ |
| 标准包装： | 1 |
| 系列： | XPhase3™ |
| 应用： | 处理器 |
| 电流 - 电源： | 6.5mA |
| 电源电压： | 4.75 V ~ 7.5 V |
| 工作温度： | 0°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-MLPQ（5x5） |
| 包装： | 标准包装 |
| 其它名称： | IR3500VMTRPBFDKR |
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IR3500V
Figure 12 depicts the start-up sequence VR11 VID with boot voltage. If there is no fault, the SS/DEL pin will start
charging when the enable crosses the threshold. The error amplifier output EAOUT is clamped low until SS/DEL
reaches 1.4V. The error amplifier will then regulate the converter’s output voltage to match the SS/DEL voltage less
the 1.4V offset until the converter output reaches the 1.1V boot voltage. The SS/DEL voltage continues to increase
until it rises above the 3.0V threshold of VID delay comparator. The VID set inputs are then activated and VDAC pin
transitions to the level determined by the VID inputs. The SS/DEL voltage continues to increase until it rises above
3.92V and allows the PGOOD signal to be asserted. SS/DEL finally settles at 4.0V, indicating the end of the soft
start.
VCC
(12V)
ENABLE
VID
1.1V
VDAC
4.0V
3.92V
3V
1.4V
SS/DEL
EAOUT
VOUT
VRRDY
START DELAY (TD1)
SOFT START
TIME (TD2)
VID SAMPLE
TIME (TD3)
VRRDY DELAY
TIME (TD4+TD5)
NORMAL OPERATION
TD4
TD5
Figure 12 - Start-up sequence
VCCL under voltage lock-out, VID fault modes, over current, as well as a low signal on the ENABLE input
immediately sets the fault latch, which causes the EAOUT pin to drive low turning off the phase IC drivers. The
PGOOD pin also drives low, and SS/DEL begin to discharge until the voltage reaches 0.2V. If the fault has cleared
the fault latch will be reset by the discharge comparator allowing a normal soft start to occur.
Other fault conditions, such as over voltage, open sense lines, open loop monitor, and open daisy chain, set
different fault latches, which start discharging SS/DEL, pull down EAOUT voltage and drive PGOOD low. However,
the latches can only be reset by cycling VCCL power.
Constant Over-Current Control during Soft Start
The over current limit threshold is set by a resistor connected between OCSET and VDAC. If the IIN pin voltage,
which is proportional to the average current plus VDAC voltage, exceeds the OCSET voltage during soft start, the
constant over-current control is activated. Figure 13 shows the constant over-current control with delay during soft
start. The delay time is set by the ROSC resistor, which sets the number of switching cycles for the delay counter.
Page 16 of 34
July 28, 2008
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IR3502 | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM CONTROL IC |
| IR3502_09 | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM CONTROL IC |
| IR3502A | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM CONTROL IC |
| IR3502AMPBF | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM CONTROL IC |
| IR3502AMTRPBF | 功能描述:IC XPHASE CTRL VR11.0/1 32-MLPQ RoHS:是 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:XPhase3™ 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
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