参数资料
| 型号： | ISL8121IRZ |
| 厂商： | Intersil |
| 文件页数： | 11/26页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 24-QFN |
| 标准包装： | 75 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 2MHz |
| 占空比： | 66% |
| 电源电压： | 4.9 V ~ 5.5 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 24-VFQFN 裸露焊盘 |
| 包装： | 管件 |
ISL8121
t SS = --------------------------------
CURRENT SENSING
ISL8121 senses current by sampling the voltage across
the lower MOSFET during its conduction interval.
MOSFET r DS(ON) sensing is a no-added-cost method to
sense current for load line regulation, channel current
balance, module current sharing, and overcurrent
protection.
The ISEN pins are used as current inputs for each
channel. Internally, a virtual ground is created at the
ISEN pins. The R ISEN resistors are used to size the
current flow through the ISEN pins, proportional to the
lower MOSFETs’ r DS(ON) voltage, during their conduction
periods. The current thus developed through the ISEN
pins is internally averaged, then the current error signals
resulting from comparing the average to the individual
current signals are used for channel current balancing.
Select the value for the R ISEN resistors based on the
room temperature r DS(ON) of the lower MOSFETs and the
full-load total converter output current, I FL .
SOFT-START
The soft-start function allows the converter to bring up
the output voltage in a controlled fashion, resulting in a
linear ramp-up. As soon as the controller is fully enabled
for operation, the SS pin starts to output a small current
which charges the external capacitor, C SS , connected to
this pin. An internal reference clamp controlled by the
potential at the SS pin releases the reference to the input
of the error amplifier with a 1:1 correspondence for SS
potential exceeding 0.7V (typically). Figure 5 details a
normal soft-start start-up. Equation 6 helps determine
the approximate time period during which the controlled
output voltage is ramped from 0V to the desired DC-set
level.
C SS ? V REF (EQ. 6)
I SS
V OUT (0.5V/DIV)
R ISEN = ----------------------- ? --------
50 × 10 – 6
r DS ( ON ) I FL
2
(EQ. 5)
As this current sense path is also used for OC detection,
ensure that at maximum power train temperature rise
and maximum output current loading the OC protection
is not inadvertently tripped. OC protection current level
through the ISEN pins is listed in the “Electrical
GND>
V intREF (0.5V/DIV)
V SS (1V/DIV)
CHANNEL-CURRENT BALANCE
Another benefit of multi-phase operation is the thermal
advantage gained by distributing the dissipated heat over
multiple devices and greater area. By doing this, the
designer avoids the complexity of driving multiple
parallel MOSFETs and the expense of using expensive
heat sinks and exotic magnetic materials.
All things being equal, in order to fully realize the thermal
advantage, it is important that each channel in a
multi-phase converter be controlled to deliver about the
same current at any load level. Intersil’s ISL8121 ensure
current balance by comparing each channel’s current to
the average current delivered by both channels and
making appropriate adjustments to each channel’s pulse
width based on the resultant error. The error signal
modifies the pulse width to correct any unbalance and
force the error toward zero.
Conversely, should a channel-to-channel imbalance be
desired, such imbalance can be created by adjusting the
individual channel’s R ISEN resistor. Asymmetrical layouts,
where one phase of the converter is naturally carrying
more current than the other, or where one of the two
phases is subject to a more stringent thermal
environment limiting its current-carrying capability, are
instances where this adjustment is particularly useful,
helping to cancel out the design-intrinsic thermal or
current imbalances.
11
EN (5V/DIV)
GND>
FIGURE 5. NORMAL SOFT-START WAVEFORMS FOR
ISL8121-BASED MULTI-PHASE CONVERTER
Whenever the ISL8121’s power-on reset falling threshold
is tripped, or it is disabled via the EN pin, the SS
capacitor is quickly discharged via an internal pull-down
device (represented as the 1mA, typical, current source).
As the SS pin’s positive excursion is internally clamped to
about 3.5V, insure that any external pull-up device does
not force more than 3mA into this pin.
Should OC protection be tripped while the ISL8121 is
operating in internal-reference mode and the SS pin not
be allowed to fully discharge the SS capacitor, the
ISL8121 cannot continue the normal SS cycling.
OVERCURRENT PROTECTION
The individual channel currents, as sensed via the PHASE
pins and scaled via the ISEN resistors, as well as their
combined average are continuously monitored and
compared with an internal overcurrent (OC) reference. If
the combined channel current average exceeds the
reference current, the overcurrent comparator triggers
an overcurrent event. Similarly, an OC event is also
triggered if either channel’s current exceeds the OC
reference for seven consecutive switching cycles.
FN6352.2
October 27, 2009
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| ISL8121IRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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| ISL8126CRZ | 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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