参数资料
型号: ISL8121IRZ
厂商: Intersil
文件页数: 13/26页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 24-QFN
标准包装: 75
PWM 型: 电压模式
输出数: 1
频率 - 最大: 2MHz
占空比: 66%
电源电压: 4.9 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 24-VFQFN 裸露焊盘
包装: 管件
ISL8121
affect the DC regulation setpoint in proportion to its
V REF
ISL8121
EXTERNAL CIRCUIT
relative magnitude compared to the external output
voltage setting resistor divider. Figure 10 details the
internal resistive network. For minimal impact on the
ERROR
AMPLIFIER
+
-
FB
R S (R 1 )
+
TO V OUT
R P
output voltage setting, follow the guidelines presented in
EXTERNAL REFERENCE OPERATION
The ISL8121 is capable of accepting an external voltage
VDIFF
and using it as a reference for its output regulation. To
enable this mode of operation, the VMON pin potential
has to be below 3.5V and the reference voltage has to be
connected to the REFTRK pin. The internal or external
X1
DIFFERENTIAL
AMPLIFIER
+
-
VSEN+
VSEN-
reference mode of operation is latched in every time the
POR is released or the ISL8121 is enabled. The highest
magnitude external reference fed to the REFTRK pin that
the ISL8121 can follow is limited to 2.3V. The ISL8121
utilizes a small initial negative offset (typically about
FIGURE 9. SETTING THE OUTPUT VOLTAGE AT THE
FB PIN
The differential amplifier can be used even if remote
output sensing is not desired or not feasible, simply
connect VSEN- to the local ground and connect VSEN+ to
the output voltage being monitored. Should one desire to
50mV) in the voltage loop at the beginning of it soft-
start, to counteract any positive offsets that may have
undesirable effects. As this initial offset is phased out as
the reference is ramped up to around 200mV, in order to
avoid an error in the output regulation level, it is
recommended the external reference has an amplitude
(final, DC level) exceeding 300mV.
bypass the differential amplifier, the circuit in Figure 9 is
recommended as the proper implementation. Since its
output is monitored for OVP and PGD purposes, the
differential amplifier needs to be connected to the
VCC
ISL8121
I H
(10 μ A)
EXTERNAL CIRCUIT
VDIFF
feedback circuit at all times, hence its input connections
to FB and local ground. However, its output, VDIFF, can
be left open. The resistor divider setting the output
voltage is calculated in a manner identical to that already
+
VMON
R S
-
revealed.
ISL8121
EXTERNAL
CIRCUIT
VMON
COMPARATOR
+
V REF
(300mV) -
R P
Z IN
VDIFF
FIGURE 11. SETTING THE MONITORING THRESHOLD
AND HYSTERESIS
-
~2μA
VSEN-
While in external reference (ER) mode, the threshold
sensitive VMON pin can be used to control when the
DIFFERENTIAL
AMPLIFIER
+
VSEN+
ISL8121 starts to monitor the output for PGD and OVP
protection purposes. As shown in Figure 11, connect the
VMON pin to the voltage to be monitored via a resistor
divider. An internal current source helps set a
user-adjustable monitor threshold hysteresis. Choose
V H R S ? V REF
R S = --------
R P = ----------------------------
Z IN > 240k Ω
OVER PROCESS, TEMPERATURE, AND
0 < (VSEN+)-(VSEN-) < 2.5V
FIGURE 10. SETTING THE OUTPUT VOLTAGE AT THE
INPUT OF THE DIFFERENTIAL AMPLIFIER
DIFFERENTIAL AMPLIFIER’S UNITY GAIN
NETWORK
The differential amplifier on the ISL8121 utilizes a typical
resistive network along with active compensating
circuitry to set its unity gain. This resistive network can
13
resistor values according to desired hysteresis voltage,
V H , and desired rising threshold, V T .
(EQ. 9)
I H V T – V REF
Make note that, in Equation 9, V REF refers to the
reference of the VMON comparator (300mV).
Intersil recommends the VMON threshold is set to be
tripped when the external reference voltage reaches at
least 90% of the final DC value. Since PGD and OVP
monitoring are relative to the external reference
FN6352.2
October 27, 2009
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