参数资料
| 型号： | ISL8121IRZ |
| 厂商： | Intersil |
| 文件页数： | 15/26页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 24-QFN |
| 标准包装： | 75 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 2MHz |
| 占空比： | 66% |
| 电源电压： | 4.9 V ~ 5.5 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 24-VFQFN 裸露焊盘 |
| 包装： | 管件 |
ISL8121
OVP has the highest priority, bypassing all other control
V OFS
V TARGET
V OUT
mechanisms and acting directly onto the lower MOSFETs,
as described. Disabling the IC via the EN pin does not
turn off OVP protection.
START-UP INTO A PRE-CHARGED OUTPUT
The ISL8121 also has the ability to start up into a
pre-charged output, without causing any unnecessary
disturbance. The FB pin is monitored during soft-start,
and should it be higher than the equivalent internal
+
V OFS
REFTRK
ISL8121
V REF
EXT CIRCUIT
ramping reference voltage, the output drives hold both
MOSFETs off. Once the internal ramping reference
exceeds the FB pin potential, the output drives are
TO V TARGET
R S
R P
E/A
+
-
FB
enabled, allowing the output to ramp from the
pre-charged level to the final level dictated by the circuit
setting.
V OFS
R 1
OUTPUT PRE-CHARGED:
+
-
VDIFF
ABOVE INTERNAL REFERENCE
ABOVE EXTERNAL REFERENCE
BELOW REFERENCE
+
-
VSEN+
+
-
X1
+
R P
V O U T ( 1 . 0 V / D I V )
V REF R P
+
---------------- = ----------------------
V OUT R P + R S
-
VSEN-
R S
-
TO V OUT
GND>
OUTPUT INITIALLY
DISCHARGED
SS (1V/DIV)
FIGURE 14. OFFSET VOLTAGE TRACKING
Offset tracking can be accomplished via a circuit similar
to that used for coincidental tracking (see Figure 14). The
desired offset can be implemented via a voltage source
inserted in line with the resistor divider present at the
REFTRK pin. Since most offset tracking requirements are
subject to fairly broad tolerances, simple voltage drop
sources can be used. Figure 14 exemplifies the use of
various counts of forward-biased diodes or that of a
schottky, although other options are available.
Sequential start-up control is easily implemented via the
EN pin, using either a logic control signal or the
ISL8121’s own EN threshold as a power-good detector
for the tracked, or sequence-triggering, voltage. See
Figure 15 for details of control using the EN pin.
OVERVOLTAGE PROTECTION
Although the normal feedback loop operation naturally
counters overvoltage (OV) events the ISL8121 benefits
from a secondary, fixed threshold overvoltage protection.
Should the output voltage exceed 120% of the reference,
the lower MOSFETs are turned on. Once turned on, the
lower MOSFETs are only turned off when the sensed
output voltage drops below the 110% falling threshold of
the OV comparator. The OVP behavior repeats for as long
as the ISL8121 is biased, should the sensed output
voltage rise back above the designated threshold. The
occurrence of an OVP event does not latch the controller;
should the phenomenon be transitory, the controller
resumes normal operation following such an event.
When operating in external-reference mode, the OVP
monitoring is enabled when the VMON pin exceeds its
rising threshold. For as long as the ISL8121 is biased,
15
EN (5V/DIV)
GND>
FIGURE 15. SOFT-START WAVEFORMS INTO A
PRE-CHARGED OUTPUT CAPACITOR BANK
As shown in Figure 15, while operating in internal
reference mode, should the output be pre-charged to a
level exceeding the circuit’s output voltage setting, the
output drives are enabled at the conclusion of the
internal reference ramp, leading to an abrupt correction
in the output voltage down to the set level.
When operating in external reference mode, should the
output voltage be pre-charged above the regulation level
driven by the external reference, the output drives are
fully enabled when the SS pin levels out at the top of its
range.
CONTROL OF ISL8121 OPERATION
The internal power-on reset circuit (POR) prevents the
ISL8121 from starting before the bias voltage at VCC and
PVCC reach the rising POR thresholds, as defined in
“Electrical Specifications” on page 5. The POR levels are
sufficiently high to guarantee that all parts of the
ISL8121 can perform their functions properly once bias is
applied to the part. While bias is below the rising POR
thresholds, the controlled MOSFETs are kept in an off
state.
FN6352.2
October 27, 2009
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| ISL8121IRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 24-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL8121IRZ-TR5453 | 制造商:Intersil Corporation 功能描述:STD. ISL8121IRZ-T WITH GOLD BOND WIRE ONLY - Tape and Reel |
| ISL8126 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Dual/n-Phase Buck PWM Controller with Integrated Drivers |
| ISL8126CRZ | 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL8126CRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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