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| 型号： | LTC3876EFE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 15/48页 |
| 文件大小： | 0K |
| 描述： | IC CTLR DC/DC DDR DUAL 38-TSSOP |
| 产品培训模块： | LTC3876 Dual DC/DC Controller |
| 标准包装： | 50 |
| 应用： | 控制器，DDR，DDR2，DDR3 |
| 输入电压： | 4.5 V ~ 38 V |
| 输出数： | 2 |
| 输出电压： | 可调 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 38-TFSOP （0.173"，4.40mm 宽）裸露焊盘 |
| 供应商设备封装： | 38-TSSOP 裸露焊盘 |
| 包装： | 管件 |
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LTC3876
OPERATION
(Refer to Functional Diagram)
ing frequency. As the top MOSFET is turned off, the bottom
MOSFET is turned on after a small delay. The delay, or dead
time, is to avoid both top and bottom MOSFETs being on
at the same time, causing shoot-through current from
V IN directly to power ground. The next switching cycle is
initiated when the current comparator, I CMP , senses that
inductor current falls below the trip level set by voltages
at the ITH and V RNG pins. The bottom MOSFET is turned
off immediately and the top MOSFET on again, restarting
the one-shot timer and repeating the cycle. Again in order
to avoid shoot-through current, there is a small dead-time
delay before the top MOSFET turns on. At this moment, the
inductor current hits its “valley” and starts to rise again.
Inductor current is determined by sensing the voltage
between SENSE + and SENSE – , either by using an explicit
resistor connected in series with the inductor or by implic-
itly sensing the inductor’s DC resistive (DCR) voltage drop
through an RC filter connected across the inductor. The
trip level of the current comparator, I CMP , is proportional
to the voltage at the ITH pin, with a zero-current threshold
corresponding to an ITH of 0.8V for channel 1 and 1.2V
for channel 2.
The error amplifier (EA) adjusts this ITH voltage by compar-
ing the feedback signal to the internal reference voltage.
On channel 1, the difference amplifier (DA) converts the
differential feedback signal (V OUTSENSE1+ – V OUTSENSE1– )
to a single-ended input for the EA; channel?2 uses VTTSNS
directly. Output voltage is regulated so that the feedback
voltage is equal to the internal reference. If the load current
increases/decreases, it causes a momentary drop/rise in
the differential feedback voltage relative to the reference.
The EA then moves ITH voltage, or inductor valley current
setpoint, higher/lower until the average inductor current
again matches the load current, so that the output voltage
comes back to the regulated voltage.
The LTC3876 features a detect transient (DTR) pin on
channel 1 to detect “load-release”, or a transient where
the load current suddenly drops, by monitoring the first
derivative of the ITH voltage. When detected, the bottom
gate (BG) is turned off and inductor current flows through
the body diode in the bottom MOSFET, allowing the SW
node voltage to drop below PGND by the body diode’s
forward-conduction voltage. This creates a more nega-
tive differential voltage (V SW – V OUT ) across the inductor,
allowing the inductor current to drop faster to zero, thus
creating less overshoot on V OUT . See Load-Release Tran-
sient Detection in Applications Information for details.
Differential Output Sensing
This dual controller’s first channel, VDDQ features dif-
ferential output voltage sensing. The output voltage is
resistively divided externally to create a feedback voltage for
the controller. The internal difference amplifier (DIFFAMP)
senses this feedback voltage with respect to the output’s
remote ground reference to create a differential feedback
voltage. This scheme eliminates any ground offsets be-
tween local ground and remote output ground, resulting in
a more accurate output voltage. Channel 1 allows remote
output ground deviate as much as ±500mV with respect
to local ground (SGND). Channel 2 VTT is referenced to
VTTR internally which differentially tracks 0.5 ? (VDDQSNS
– V OUTSENSE– ).
DRV CC /EXTV CC /INTV CC Power
DRV CC1,2 are the power for the bottom MOSFET drivers.
Normally the two DRV CC pins are shorted together on
the PCB, and decoupled to PGND with a minimum 4.7μF
ceramic capacitor, C DRVCC . The top MOSFET drivers are
biased from the floating bootstrap capacitors (C B ) which
are recharged during each cycle through an external
Schottky diode when the top MOSFET turns off and the
SW pin swings down.
The DRV CC can be powered on two ways: an internal low-
dropout (LDO) linear voltage regulator that is powered
from V IN and can output 5.3V to DRV CC1 . Alternatively,
an internal EXTV CC switch (with on-resistance of around
2Ω) can short the EXTV CC pin to DRV CC2 .
If the EXTV CC pin is below the EXTV CC switchover voltage
(typically 4.7V with 200mV hysteresis, see the Electrical
Characteristics Table), then the internal 5.3V LDO is en-
abled. If the EXTV CC pin is tied to an external voltage source
greater than this EXTV CC switchover voltage, then the LDO
is shut down and the internal EXTV CC switch shorts the
EXTV CC pin to the DRV CC2 pin, thereby powering DRV CC
3876f
15
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