- 您现在的位置：买卖IC网 > PDF目录224123 > M25P40-VMN6TG/X (NUMONYX) 512K X 8 SPI BUS SERIAL EEPROM, PDSO8 PDF资料下载
参数资料
| 型号： | M25P40-VMN6TG/X |
| 厂商： | NUMONYX |
| 元件分类： | PROM |
| 英文描述： | 512K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| 封装： | 0.150 INCH, ROHS COMPLIANT, PLASTIC, SOP-8 |
| 文件页数： | 17/57页 |
| 文件大小： | 1160K |
| 代理商： | M25P40-VMN6TG/X |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页当前第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页
Instructions
M25P40
24/57
6.5
Write Status Register (WRSR)
The Write Status Register (WRSR) instruction allows new values to be written to the Status
Register. Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed. After the Write Enable (WREN) instruction has been decoded and
executed, the device sets the Write Enable Latch (WEL).
The Write Status Register (WRSR) instruction is entered by driving Chip Select (S) Low,
followed by the instruction code and the data byte on Serial Data input (D).
The instruction sequence is shown in Figure 11.
The Write Status Register (WRSR) instruction has no effect on b6, b5, b1 and b0 of the
Status Register. b6 and b5 are always read as 0.
Chip Select (S) must be driven High after the eighth bit of the data byte has been latched in.
If not, the Write Status Register (WRSR) instruction is not executed. As soon as Chip Select
(S) is driven High, the self-timed Write Status Register cycle (whose duration is tW) is
initiated. While the Write Status Register cycle is in progress, the Status Register may still
be read to check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP)
bit is 1 during the self-timed Write Status Register cycle, and is 0 when it is completed.
When the cycle is completed, the Write Enable Latch (WEL) is reset.
The Write Status Register (WRSR) instruction allows the user to change the values of the
Block Protect (BP2, BP1, BP0) bits, to define the size of the area that is to be treated as
read-only, as defined in Table 2. The Write Status Register (WRSR) instruction also allows
the user to set or reset the Status Register Write Disable (SRWD) bit in accordance with the
Write Protect (W) signal. The Status Register Write Disable (SRWD) bit and Write Protect
(W) signal allow the device to be put in the Hardware Protected Mode (HPM). The Write
Status Register (WRSR) instruction is not executed once the Hardware Protected Mode
(HPM) is entered.
Figure 11.
Write Status Register (WRSR) instruction sequence
C
D
AI02282D
S
Q
2
1
3456789 10 11 12 13 14 15
High Impedance
Instruction
Status
Register In
0
765432
0
1
MSB
相关PDF资料 |
PDF描述 |
|---|---|
| M25P40VMF6 | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40VMF6G | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40VMF6P | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40VMF6T | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40VMF6TG | 4 Mbit Uniform Sector, Serial Flash Memory |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M25P40VMN6TP | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface |
| M25P40-VMN6TP | 功能描述:闪存 SERIAL SECTOR ERASE FLASH 4MEG RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| M25P40-VMN6TP/X | 制造商:NUMONYX 制造商全称:Numonyx B.V 功能描述:4 Mbit, low voltage, serial Flash memory with 50 MHz SPI bus interface |
| M25P40-VMN6TP_NUD | 制造商:Micron Technology Inc 功能描述: |
| M25P40-VMN6TPB | 功能描述:IC FLASH 4MBIT 75MHZ 8SOIC RoHS:是 类别:集成电路 (IC) >> 存储器 系列:Forté™ 标准包装:2,000 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 异步 存储容量:256K (32K x 8) 速度:15ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:28-TSSOP（0.465"，11.8mm 宽） 供应商设备封装:28-TSOP 包装:带卷 (TR) 其它名称:71V256SA15PZGI8 |
发布紧急采购，3分钟左右您将得到回复。