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参数资料
| 型号： | M295V200T-55M1R |
| 厂商： | 意法半导体 |
| 英文描述： | CONNECTOR ACCESSORY |
| 中文描述： | 连接器附件 |
| 文件页数： | 10/33页 |
| 文件大小： | 224K |
| 代理商： | M295V200T-55M1R |
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DQ
Name
Logic Level
Definition
Note
7
Data
Polling
’1’
Erase Complete or erase
block in Erase Suspend
Indicates the P/E.C. status, check during
Program or Erase, and on completion
before checking bits DQ5 for Program or
Erase Success.
’0’
Erase On-going
DQ
Program Complete or data
of non erase block during
Erase Suspend
DQ
Program On-going
6
Toggle Bit
’-1-0-1-0-1-0-1-’
Erase or Program On-going
Successive reads outputcomplementary
data on DQ6 while Programming orErase
operations are on-going. DQ6 remains at
constant level when P/E.C. operations are
completed or Erase Suspend is
acknowledged.
DQ
Program Complete
’-1-1-1-1-1-1-1-’
Erase Complete or Erase
Suspend on currently
addressed block
5
Error Bit
’1’
Program or Erase Error
This bit is set to ’1’in the case of
Programming or Erase failure.
’0’
Program or Erase On-going
4
Reserved
3
Erase
Time Bit
’1’
Erase TimeoutPeriod Expired
P/E.C. Erase operation has started. Only
possible command entry isErase Suspend
(ES).
’0’
Erase TimeoutPeriod
On-going
An additional block to be erased in parallel
can be entered to the P/E.C.
2
Toggle Bit
’-1-0-1-0-1-0-1-’
Chip Erase, Erase or Erase
Suspend on the currently
addressed block.
Erase Error due to the
currently addressedblock
(when DQ5 = ’1’).
Indicates the erase status and allows to
identify the erased block
1
Program on-going,Erase
on-going on another block or
Erase Complete
DQ
Erase Suspend read on
non Erase Suspend block
1
Reserved
0
Reserved
Notes:
Logic level ’1’is High, ’0’ is Low.-0-1-0-0-0-1-1-1-0- represent bit value in successive Read operations.
Table 9. StatusRegister Bits
Toggle Bit (DQ6).
WhenProgrammingor Erasing
operationsarein progress,successiveattemptsto
readDQ6willoutputcomplementarydata.DQ6will
toggle following toggling of either G, or E when G
is low. The operationis completedwhen two suc-
cessivereadsyieldthesameoutputdata.Thenext
readwilloutputthe bitlastprogrammedora’1’after
erasing. The toggle bit DQ6 is valid only during
P/E.C. operations, that is after the fourth W pulse
for programming or after the sixth W pulse for
Erase. If the blocks selected for erasure are pro-
tected, DQ6 will toggle for about 100
μ
s and then
returnback toRead. DQ6will besetto’1’if aRead
operationis attemptedonan EraseSuspendblock.
When erase is suspendedDQ6 will toggle during
programming operations in a blockdifferentto the
block in EraseSuspend.Either E or G togglingwill
causeDQ6 to toggle. See Figure 12 for ToggleBit
flowchartand Figure 13 for ToggleBit waveforms.
10/33
M29F200T, M29F200B
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