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参数资料
| 型号： | M295V200T-55M1R |
| 厂商： | 意法半导体 |
| 英文描述： | CONNECTOR ACCESSORY |
| 中文描述： | 连接器附件 |
| 文件页数： | 6/33页 |
| 文件大小： | 224K |
| 代理商： | M295V200T-55M1R |
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Ready/Busy Output (RB).
Ready/Busy is an
open-drainoutputandgivestheinternalstateof the
P/E.C. of the device. When RB is Low, the device
is Busy with a Program or Erase operation and it
will not accept any additional program or erase
instructionsexcept the Erase Suspendinstruction.
WhenRBis High,the deviceis readyforanyRead,
Program or Erase operation. The RB will also be
Highwhen the memoryis putin EraseSuspendor
Standbymodes.
Reset/Block Temporary Unprotect Input (RP).
The RP Input provides hardware reset and pro-
tected block(s) temporary unprotection functions.
Reset of the memory is acheived by pulling RP to
V
IL
for at least 500ns. When the reset pulse is
given, ifthe memoryis in Reador Standbymodes,
it will be availablefor new operationsin 50nsafter
the rising edge of RP. If the memory is in Erase,
Erase Suspend or Program modes the reset will
take 10
μ
s during which the RB signal will be held
atV
IL
.Theendof thememoryresetwillbeindicated
by the rising edge of RB. Ahardware reset during
anEraseor Programoperationwillcorruptthedata
beingprogrammedor the sector(s)being erased.
Temporary block unprotection is made by holding
RP at V
ID
. In this condition previously protected
blocks can be programmed or erased. The transi-
tionof RP from V
IH
to V
ID
must slowerthan500ns.
When RP is returned from V
ID
to V
IH
all blocks
temporarily unprotectedwill be again protected.
V
CC
Supply Voltage.
The power supply for all
operations(Read, Programand Erase).
V
SS
Ground.
V
SS
is the reference for all voltage
measurements.
DEVICEOPERATIONS
See Tables 4, 5 and 6.
Read.
Read operations are used to output the
contents of the Memory Array, the ElectronicSig-
nature,theStatusRegisteror the BlockProtection
Status.Both Chip Enable E and Output Enable G
must be low in order to read the output of the
memory.
Write.
Writeoperationsareusedto giveInstruction
Commands to the memoryor tolatch input datato
beprogrammed.Awrite operationisinitiatedwhen
Chip Enable E is Low and Write Enable W is Low
withOutput Enable G High.Addressesarelatched
onthefallingedge of WorEwhicheveroccurslast.
CommandsandInputDataarelatchedontherising
edge of W or E whicheveroccurs first.
OutputDisable.
Thedata outputsarehighimped-
ancewhen the OutputEnable G is Highwith Write
EnableW High.
Standby.
The memory is in standby when Chip
EnableE is Highand the P/E.C.is idle. The power
consumption is reduced to the standby level and
the outputs are high impedance, independent of
the Output Enable G or Write EnableW inputs.
Automatic Standby.
After 150ns of bus inactivity
andwhen CMOSlevels are driving the addresses,
the chip automatically enters a pseudo-standby
modewhereconsumptionis reducedto theCMOS
standbyvalue, while outputsstill drive the bus.
Electronic Signature.
Two codes identifyingthe
manufacturer andthe devicecan beread fromthe
memory. The manufacturer’s code for STMi-
croelectronicsis 20h,thedevicecodeisD3hforthe
M29F200T(Top Boot) and D4h forthe M29F200B
(Bottom Boot). These codes allow programming
equipment or applications to automatically match
their interface to the characteristics of the
M29F200. The ElectronicSignatureis outputby a
Read operation when the voltage applied to A9 is
at V
ID
andaddressinput A1 is Low. The manufac-
turer code is output when the Address input A0 is
Low and the device code when this input is High.
Other Address inputs are ignored. The codes are
outputon DQ0-DQ7.
TheElectronicSignaturecan alsobe read, without
raisingA9 toV
ID
, bygivingthememorythe Instruc-
tion AS. If the Byte-wide configurationis selected
thecodesareoutputonDQ0-DQ7with DQ8-DQ14
at High impedance;if the Word-wideconfiguration
isselectedthe codesare output on DQ0-DQ7with
DQ8-DQ15 at 00h.
Block Protection.
Each block can be separately
protected against Program or Erase on program-
ming equipment. Block protection provides addi-
tional data security, as it disables all program or
eraseoperations.Thismodeisactivatedwhenboth
A9 and G are raised to V
ID
and an address in the
block is appliedon A12-A16.The Block Protection
algorithmis showninFigure14. Blockprotectionis
initiated on the edge of W fallingto V
IL
. Then after
a delayof 100
μ
s, the edge of W rising to V
IH
ends
theprotectionoperations.Blockprotectionverifyis
achievedby bringingG, E, A0and A6toV
IL
andA1
to V
IH
, whileWis atV
IH
andA9at V
ID
. Underthese
conditions,reading the data outputwill yield 01h if
the block defined by the inputs on A12-A16 is
protected.Any attemptto programor erasea pro-
tectedblockwill be ignoredby the device.
6/33
M29F200T, M29F200B
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相关代理商/技术参数 |
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| M295V200T-55M1TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8 or 128Kb x16, Boot Block Single Supply Flash Memory |
| M295V200T-55M3R | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8 or 128Kb x16, Boot Block Single Supply Flash Memory |
| M295V200T-55M3TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8 or 128Kb x16, Boot Block Single Supply Flash Memory |
| M295V200T-55M6R | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8 or 128Kb x16, Boot Block Single Supply Flash Memory |
| M295V200T-55M6TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8 or 128Kb x16, Boot Block Single Supply Flash Memory |
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