参数资料
型号: M295V400T-55N6R
厂商: 意法半导体
英文描述: 4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory
中文描述: 4兆位512KB的x8或256Kb的x16插槽,启动座单电源闪存
文件页数: 10/34页
文件大小: 231K
代理商: M295V400T-55N6R
Mne.
Instr.
Cyc.
1st Cyc.
2nd Cyc.
3rdCyc.
4th Cyc.
5th Cyc.
6th Cyc.
7th Cyc.
RD
(2,4)
Read/Reset
Memory Array
1+
Addr.
(3,7)
X
Read Memory Array until a new write cycle is initiated.
Data
F0h
3+
Addr.
(3,7)
Byte
AAAAh
5555h
AAAAh
Read Memory Array until a new write cycle
is initiated.
Word
5555h
2AAAh
5555h
Data
AAh
55h
F0h
AS
(4)
Auto Select
3+
Addr.
(3,7)
Byte
AAAAh
5555h
AAAAh
Read Electronic Signature or Block
Protection Status until a new write cycle is
initiated. See Note 5 and 6.
Word
5555h
2AAAh
5555h
Data
AAh
55h
90h
PG
Program
4
Addr.
(3,7)
Byte
AAAAh
5555h
AAAAh
Program
Address
Read DataPolling or Toggle Bit
until Program completes.
Word
5555h
2AAAh
5555h
Data
AAh
55h
A0h
Program
Data
BE
Block Erase
6
Addr.
(3,7)
Byte
AAAAh
5555h
AAAAh
AAAAh
5555h
Block
Address
Additional
Block
Word
5555h
2AAAh
5555h
5555h
2AAAh
Data
AAh
55h
80h
AAh
55h
30h
30h
CE
Chip Erase
6
Addr.
(3,7)
Byte
AAAAh
5555h
AAAAh
AAAAh
5555h
AAAAh
Note 9
Word
5555h
2AAAh
5555h
5555h
2AAAh
5555h
Data
AAh
55h
80h
AAh
55h
10h
ES
(10)
Erase
Suspend
1
Addr.
(3,7)
X
Read until Toggle stops, then read all the data needed from any
Block(s) not being erased then Resume Erase.
Data
B0h
ER
Erase
Resume
1
Addr.
(3,7)
X
Read Data Polling or Toggle Bits until Erase completes or Erase is
suspended another time
Data
30h
Notes:
1. Commands not interpreted in thistable will defaultto read array mode.
2. Await of t
is necessary after a Read/Resetcommand if the memory was in an Erase or Program mode
before startingany new operation (seeTable 14 andFigure 9).
3. X = Don’t Care.
4. The first cycles of the RD or AS instructions are followed by read operations. Any number of readcycles can occur after
the command cycles.
5. SignatureAddress bits A0, A1 at V
IL
willoutput Manufacturer code (20h). Address bits A0 at V
IH
andA1 at V
IL
willoutput
Device code.
6. Block Protection Address:A0 atV
, A1 at V
and A12-A17 within the Block will output the Block Protection status.
7. For Coded cycles address inputs A15-A17 are don’t care.
8. Optional, additional Blocks addresses must be enteredwithin the erase timeout delay after last write entry,
timeout status can be verified through DQ3 value (see Erase TimerBit DQ3 description).
When full command is entered, read Data Polling or Togglebit until Erase is completedor suspended.
9. ReadData Polling, Toggle bits or RB until Erase completes.
10.During Erase Suspend, Read and Data Program functions are allowed in blocks not being erased.
Table 8. Instructions
(1)
10/34
M29F400T, M29F400B
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