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参数资料
| 型号： | M295V400T-55N6R |
| 厂商： | 意法半导体 |
| 英文描述： | 4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| 中文描述： | 4兆位512KB的x8或256Kb的x16插槽，启动座单电源闪存 |
| 文件页数： | 3/34页 |
| 文件大小： | 231K |
| 代理商： | M295V400T-55N6R |
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Symbol
Parameter
Value
Unit
T
A
Ambient Operating Temperature
(3)
–40 to 125
°
C
T
BIAS
Temperature Under Bias
–50 to 125
°
C
T
STG
V
IO(2)
Storage Temperature
–65 to 150
°
C
Input or OutputVoltages
–0.6 to 7
V
V
CC
Supply Voltage
–0.6 to 7
V
V
(A9, E, G, RP)
(2)
A9, E, G, RP Voltage
–0.6 to 13.5
V
Notes:
1. Except for the rating ”Operating Temperature Range”, stresses above those listedin theTable ”Absolute Maximum Ratings”
may cause permanent damage to the device. These are stress ratings only andoperation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affectdevice reliability.Refer also to the STMicroelectronicsSURE Program and other
relevant quality documents.
2. Minimum Voltagemay undershoot to –2V during transition and for less than 20ns.
3. Depends on range.
Table 2. AbsoluteMaximum Ratings
(1)
graming and erase on programming equipment,
and temporarily unprotected to make changes in
the application.
Instructions for Read/Reset, Auto Select for read-
ing the Electronic Signature or Block Protection
status,Programming, BlockandChipErase,Erase
Suspend and Resume are written to the device in
cyclesof commandstoa CommandInterfaceusing
standard microprocessor write timings.
The device is offeredin TSOP48 (12x 20mm)and
SO44packages. Both normal and reversepinouts
are available for the TSOP48 package.
Organisation
TheM29F400 isorganisedas512Kx8or256Kx16
bits selectable by the BYTEsignal. When BYTEis
Low the Byte-wide x8 organisation is selected and
the address lines are DQ15A–1 and A0-A17. The
Data Input/Output signal DQ15A–1 acts as ad-
dress line A–1 which selects the lower or upper
Byte of the memory word for output on DQ0-DQ7,
DQ8-DQ14 remain at High impedance. When
BYTEis Highthe memoryusestheaddressinputs
A0-A17 and the Data Input/Outputs DQ0-DQ15.
Memory control is provided by Chip Enable E,
Output Enable G and WriteEnable W inputs.
AReset/BlockTemporaryUnprotection RPtri-level
input provides a hardware reset when pulled Low,
andwhenheldHigh(atV
ID
) temporarily unprotects
blocks previously protected allowing them to be
programed anderased.Erase and Programopera-
tions are controlled by an internal Program/Erase
Controller (P/E.C.). StatusRegister data output on
DQ7providesa DataPollingsignal, and DQ6and
DQ2provide Toggle signals to indicate thestate of
the P/E.C operations. A Ready/Busy RB output
indicates the completionof theinternal algorithms.
Memory Blocks
The devices featureasymmetrically blockedarchi-
tectureproviding system memory integration.Both
M29F400T and M29F400B devices have an array
of 11 blocks, one Boot Block of 16 KBytes or 8
KWords, two Parameter Blocks of 8 KBytes or 4
KWords, one Main Block of 32 KBytes or 16
KWords and sevenMainBlocksof 64KBytesor32
KWords. TheM29F400Thas theBoot Blockat the
top of the memory address space and the
M29F400B locates the Boot Block starting at the
bottom. The memory maps are showed in Figure
3. Eachblock can be erasedseparately, any com-
bination of blocks can be specified for multi-block
eraseor theentire chip maybe erased.The Erase
operations are managed automatically by the
P/E.C. The block erase operation can be sus-
pended in order to read from or program to any
block not being ersased, and then resumed.
Block protection provides additional data security.
Each block can be separately protected or unpro-
tected against Program or Erase on programming
equipment. All previously protected blocks can be
temporarily unprotected in the application.
Bus Operations
The following operations can be performed using
the appropriate bus cycles:Read(Array, Electronic
Signature, Block Protection Status), Write com-
mand, Output Disable, Standby, Reset, Block Pro-
tection, Unprotection, Protection Verify,
Unprotection Verify and Block Temporary Unpro-
tection. See Tables 4 and 5.
DESCRIPTION
(Cont’d)
3/34
M29F400T, M29F400B
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M295V400T-55N6TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| M295V400T-70M1R | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| M295V400T-70M1TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| M295V400T-70M3R | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| M295V400T-70M3TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
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