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参数资料
| 型号： | M295V400T-55N6R |
| 厂商： | 意法半导体 |
| 英文描述： | 4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| 中文描述： | 4兆位512KB的x8或256Kb的x16插槽，启动座单电源闪存 |
| 文件页数： | 13/34页 |
| 文件大小： | 231K |
| 代理商： | M295V400T-55N6R |
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AI01275B
3V
High Speed
0V
1.5V
2.4V
Standard
0.45V
2.0V
0.8V
Figure 4. AC Testing InputOutput Waveform
AI01276B
1.3V
OUT
CL
CL= 30pF for High Speed
CL= 100pF for Standard
CLincludes JIG capacitance
3.3k
1N914
DEVICE
UNDER
TEST
Figure5. AC Testing Load Circuit
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
12
pF
Note:
1. Sampled only, not 100% tested.
Table 12. Capacitance
(1)
(T
A
= 25
°
C, f = 1 MHz )
Block Erase (BE) Instruction
. This instruction
uses a minimum of six write cycles. The Erase
Set-upcommand 80h is written to address AAAAh
in the Byte-wide configuration or address5555h in
theWord-wide configurationon thirdcycleafterthe
two Codedcycles. The Block Erase Confirm com-
mand30h is similarlywrittenon thesixthcycleafter
another two Coded cycles. During the input of the
secondcommand anaddress withintheblocktobe
erasedis givenand latchedinto thememory.Addi-
tional block Erase Confirm commands and block
addresses can be written subsequently to erase
other blocks in parallel, without further Coded cy-
cles. The erase will start after the erase timeout
period (see Erase Timer Bit DQ3 description).
Thus, additional Erase Confirm commands for
other blocks must be given within this delay. The
input of a newEraseConfirm command willrestart
the timeoutperiod. The status of the internal timer
can be monitoredthrough the level of DQ3,if DQ3
is ’0’ the Block Erase Command has been given
and thetimeout is running, ifDQ3is’1’, thetimeout
has expiredand the P/E.C.is erasingthe Block(s).
If the second command given is not an erase
confirm or if the Coded cycles are wrong, the
instruction aborts, and the device is reset to Read
Array. It isnot necessaryto programthe block with
00h as the P/E.C. will do this automatically before
to erasing to FFh. Read operations after the sixth
rising edge of W or E output the status register
status bits.
High Speed
Standard
Input Rise and Fall Times
≤
10ns
≤
10ns
Input Pulse Voltages
0 to 3V
0.45V to 2.4V
Input and Output Timing Ref. Voltages
1.5V
0.8V and 2V
Table 11. ACMeasurement Conditions
13/34
M29F400T, M29F400B
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相关代理商/技术参数 |
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|---|---|
| M295V400T-55N6TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| M295V400T-70M1R | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| M295V400T-70M1TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| M295V400T-70M3R | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| M295V400T-70M3TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
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