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参数资料
| 型号： | M295V400T-55N6R |
| 厂商： | 意法半导体 |
| 英文描述： | 4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| 中文描述： | 4兆位512KB的x8或256Kb的x16插槽，启动座单电源闪存 |
| 文件页数： | 14/34页 |
| 文件大小： | 231K |
| 代理商： | M295V400T-55N6R |
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Symbol
Parameter
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
0V
≤
V
IN
≤
V
CC
±
1
μ
A
I
LO
Output Leakage Current
0V
≤
V
OUT
≤
V
CC
±
1
μ
A
I
CC1
Supply Current (Read) TTLByte
E = V
IL
, G = V
IH
, f = 6MHz
20
mA
I
CC1
Supply Current (Read) TTLWord
E = V
IL
, G = V
IH
, f = 6MHz
20
mA
I
CC2
Supply Current (Standby) TTL
E = V
IH
1
mA
I
CC3
Supply Current (Standby) CMOS
E = V
CC
±
0.2V
100
μ
A
I
CC4(1)
Supply Current (Program orErase)
Byte program, Block or
Chip Erase in progress
20
mA
V
IL
Input Low Voltage
–0.5
0.8
V
V
IH
Input High Voltage
2
V
CC
+ 0.5
V
V
OL
Output Low Voltage
I
OL
= 5.8mA
0.45
V
V
OH
Output High Voltage TTL
I
OH
= –2.5mA
2.4
V
Output High Voltage CMOS
I
OH
= –100
μ
A
V
CC
–0.4V
V
V
ID
A9 Voltage(Electronic Signature)
11.0
12.0
V
I
ID
A9 Current (Electronic Signature)
A9 = V
ID
100
μ
A
V
LKO
Supply Voltage (Erase and
Program lock-out)
3.2
4.2
V
Note:
1. Sampled only, not 100% tested.
Table 13. DC Characteristics
(T
A
= 0 to 70
°
C, –40 to 85
°
C or –40 to 125
°
C; V
CC
= 5V
±
10%)
Duringtheexecutionof theeraseby theP/E.C.,the
memory accepts only the Erase Suspend ES and
Read/Reset RD instructions. Data Polling bit DQ7
returns ’0’ while the erasure is in progress and ’1’
when it has completed. The Toggle bit DQ2 and
DQ6 toggle during the eraseoperation. They stop
when erase is completed. After completion the
StatusRegisterbit DQ5returns’1’iftherehasbeen
an erase failure. In sucha situation, the Toggle bit
DQ2 can be used to determine which block is not
correctly erased. In the case of erase failure, a
Read/Reset RD instruction isnecessary in orderto
reset the P/E.C.
ChipErase(CE)Instruction.
Thisinstructionuses
six write cycles. The Erase Set-up command 80h
is written to address AAAAh in the Byte-wide con-
figuration or the address 5555h in the Word-wide
configuration on thethirdcycleafterthe twoCoded
cycles. The Chip Erase Confirm command 10h is
similarlywrittenonthe sixthcycleafteranothertwo
Codedcycles.If thesecond command givenis not
an erase confirm or if the Codedcycles are wrong,
the instruction aborts and the device is reset to
ReadArray.It isnotnecessaryto programthearray
with00hfirstas theP/E.C.willautomaticallydothis
beforeerasing it to FFh. Read operations after the
sixth rising edge of W or E output the Status
Registerbits. During the execution of theeraseby
the P/E.C.,Data Polling bit DQ7returns’0’,then ’1’
on completion. The Toggle bits DQ2 and DQ6
toggleduringerase operation andstopwhenerase
is completed. Aftercompletion the StatusRegister
bit DQ5 returns ’1’ if there has been an Erase
Failure.
14/34
M29F400T, M29F400B
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相关代理商/技术参数 |
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|---|---|
| M295V400T-55N6TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| M295V400T-70M1R | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| M295V400T-70M1TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| M295V400T-70M3R | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
| M295V400T-70M3TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory |
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