参数资料
型号: M295V400T-55N6R
厂商: 意法半导体
英文描述: 4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory
中文描述: 4兆位512KB的x8或256Kb的x16插槽,启动座单电源闪存
文件页数: 15/34页
文件大小: 231K
代理商: M295V400T-55N6R
Symbol
Alt
Parameter
Test
Condition
M29F400T / M29F400B
Unit
-55
-70
High Speed
Interface
Standard
Interface
Min
Max
Min
Max
t
AVAV
t
RC
Address Valid to Next Address Valid
E = V
IL
,
G = V
IL
55
70
ns
t
AVQV
t
ACC
Address Valid to Output Valid
E = V
IL
,
G = V
IL
55
70
ns
t
ELQX(1)
t
ELQV(2)
t
GLQX(1)
t
GLQV(2)
t
LZ
Chip Enable Low to Output Transition
G = V
IL
0
0
ns
t
CE
Chip Enable Low to Output Valid
G = V
IL
55
70
ns
t
OLZ
Output Enable Low to Output Transition
E = V
IL
0
0
ns
t
OE
Output Enable Low to Output Valid
E = V
IL
30
30
ns
t
EHQX
t
EHQZ(1)
t
OH
Chip Enable High to Output Transition
G = V
IL
0
0
ns
t
HZ
Chip Enable High to Output Hi-Z
G = V
IL
15
20
ns
t
GHQX
t
GHQZ(1)
t
OH
Output Enable High to Output Transition
E = V
IL
0
0
ns
t
DF
Output Enable High to Output Hi-Z
E = V
IL
15
20
ns
t
AXQX
t
OH
Address Transition to Output Transition
E = V
IL
,
G = V
IL
0
0
ns
t
PLYH(1,3)
t
RRB
t
READY
RP Low to Read Mode
10
10
μ
s
t
PHEL
t
RH
RP High to Chip Enable Low
50
50
ns
t
PLPX
t
RP
RP Pulse Width
500
500
ns
t
ELBL
t
ELBH
t
ELFL
t
ELFH
Chip Enable to BYTESwitching Low or
High
5
5
ns
t
BLQZ
t
FLQZ
BYTESwitching Low to Output
High Z
15
20
ns
t
BHQV
t
FHQV
BYTESwitching High to Output
Valid
30
30
ns
Notes:
1. Sampled only, not 100% tested.
2. G may be delayed by upto t
- t
afterthe falling edge of E without increasing t
.
3. Tobe considered only if the Reset pulse is given while the memory is in Erase or Program mode.
Table 14A. Read AC Characteristics
(T
A
= 0 to 70
°
C, –40 to 85
°
C or –40 to 125
°
C)
15/34
M29F400T, M29F400B
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