参数资料
型号: M6MGB166S2BWG
厂商: Mitsubishi Electric Corporation
英文描述: CMOS 3.3V-ONLY FLASH MEMORY & CMOS SRAM Stacked-CSP
中文描述: 3.3的CMOS只快闪记忆体
文件页数: 30/30页
文件大小: 253K
代理商: M6MGB166S2BWG
Nov 1999 , Rev.2.3
MITSUBISHI LSIs
16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS
3.3V-ONLY FLASH MEMORY &
2,097,152-BIT (131,072-WORD BY 16-BIT) CMOS SRAM
Stacked-CSP (Chip Scale Package)
M6MGB/T166S2BWG
POWER DOWN CHARACTERISTICS
t
su (PD)
t
rec (PD)
ns
ms
(2) TIMING REQUIREMINTS
Symbol
Parameter
Test conditions
Limits
Typ
Min
0
5
Max
Units
Power down set up time
Power down recovery time
30
(1) ELECTRICAL CHARACTERISTICS
(3) TIMING DIAGRAM
2.2V
t
su (PD)
2.7V
2.7V
2.2V
t
rec (PD)
S-LB#,S-UB#>
S-Vcc
S-LB#,
S-UB#
S-LB#,S-UB# control mode
2.2V
t
su (PD)
2.7V
2.7V
2.2V
t
rec (PD)
S-Vcc
S-CE1#
S-CE1# control mode
S-CE1# >
S-Vcc
S-CE2 control mode
0.2V
t
su (PD)
2.7V
2.7V
0.2V
t
rec (PD)
S-CE2
S-CE2<
V
V
V
V
2.0
2.0
2.0
S-Vcc
(PD)
V
I (S-BC)
V
I (S-CE1#)
V
I (S-CE2)
Symbol
Parameter
Test conditions
Limits
Typ
Min
Max
Units
Power down supply voltage
Byte control input S-LB#,S-UB#
Typical value is for Ta=25
°
C
Icc
(PD)
+25 ~ +40
°
C
-I
8
1
3
-
-
24
-
-
-
m
A
Power down
supply current
+40 ~ +70
°
C
+70 ~ +85
°
C
Chip enable input S-CE1#
Chip enable input S-CE2
0.2
m
A
m
A
S-Vcc=3.0V
S-CE2 0.2V
other inputs=0~3V
- 40 ~ +25
°
C
-
0.3
1
m
A
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