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参数资料
| 型号： | MAX14830ETM+ |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | SERIAL COMM CONTROLLER, QCC48 |
| 封装： | 7 X 7 MM, ROHS COMPLIANT, TQFN-48 |
| 文件页数： | 10/68页 |
| 文件大小： | 2356K |
| 代理商： | MAX14830ETM+ |
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MAX14830
Quad Serial UART with 128-Word FIFOs
and Internal Oscillator
18
Detailed Description
The MAX14830 quad UART bridges an SPI/MICROWIRE
or I2C microprocessor bus to an asynchronous interface
like RS-485, RS-232, or IrDA. The MAX14830 contains
advanced UARTs and baud-rate generators with a
synchronous serial-data interface and an interrupt gen-
erator. The MAX14830 is configured by writing an 8-bit
word to the configuration registers through either SPI or
I2C. These registers are organized by related function as
shown in the Register Map.
The host controller loads transmit data into the THR
register through SPI or I2C. This data is automatically
pushed into the Transmit FIFOs, formatted, and sent out
at TX_. The MAX14830 adds START and STOP and par-
ity bits to the data and sends the data out at the selected
baud rates. The clock configuration registers determine
the baud rates, clock source selection, clock frequency
prescaling, and fractional baud-rate generators.
The MAX14830 receiver detects a START bit as a high-
to-low RX_ transition. An internal clock samples this data
at 16 times the data rate. The received data is automati-
cally placed in the Receive FIFOs and can then be read
out of the RxFIFOs through the RHRs.
The MAX14830 features four identical UARTS. Text in
this data sheet references individual UART operation,
unless otherwise noted.
Receive and Transmit FIFOs
The UART’s receiver and the transmitter each have a
128-word deep FIFO reducing the intervals that the
host processor needs to dedicate for high-speed, high-
volume data transfer. As the data rates of the asynchro-
nous RX_ and TX_ interfaces increase and get closer to
those of the host controller’s SPI/I2C data rates, UART
management and flow control can make up a significant
portion of the host’s activity. By increasing FIFO size, the
host is interrupted less often and can utilize SPI and I2C
burst data block transfers to/from the FIFOs.
FIFO trigger levels can generate interrupts to the host
controller, signaling that programmed FIFO fill levels
have been reached. The transmitter and receiver trig-
ger levels are programmed through FIFOTrigLvl with a
resolution of eight FIFO locations. When a Receive FIFO
trigger is generated, the host knows that the Receive
FIFO has a defined number of words waiting to be read
out or that a known number of vacant FIFO locations are
available, ready to be filled. The Transmit FIFO trigger
generates an interrupt when the Transmit FIFO level
is above the programmed trigger level. The host then
knows to throttle data writing to the Transmit FIFO.
The host can read out the number of words present in
each of the FIFOs at any time through the TxFIFOLvl and
RxFIFOLvl registers.
Transmitter Operation
Figure 3 shows the structure of the transmitter with the
TxFIFO. The Transmit FIFO can hold up to 128 words that
are written to it through the Transmit Holding Register
(THR).
The current number of words in the TxFIFO can be read
out through the TxFIFOLvl register. The Transmit FIFO
can be programmed to generate an interrupt when a
programmed number of words are present in the TxFIFO
through the FIFOTrgLvl register. The TxFIFO interrupt
trigger level is selectable through FIFOTrgLvl[3:0]. When
the Transmit FIFO fill level reaches the programmed trig-
ger level, the ISR[4] interrupt is set.
The Transmit FIFO is empty when ISR[5]:TFifoEmptyInt
is set. ISR[5] turns high when the transmitter starts trans-
mitting the last word in the TxFIFO. Hence the transmitter
is completely empty after ISR[5] is set with an addi-
tional delay equal to the length of a complete character
(including START, parity, and STOP bits).
MICROWIRE is a trademark of National Semiconductor Corp.
Figure 3. Transmit FIFO Signals
DATA FROM SPI/I2C
INTERFACE
THR
128
TRIGGER
ISR[4]
TxFIFOLvL
FIFO TRGLVL[3:0]
CURRENT FILL LEVEL
TRANSMIT
FIFO
TRANSMIT
SHIFT-REGISTER
TX_
3
2
1
LEVEL
EMPTY
ISR[5]
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX14830ETM+ | 功能描述:UART 接口集成电路 Quad Serial UART w/128-Word FIFOs RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| MAX14830ETM+T | 功能描述:UART 接口集成电路 Quad Serial UART w/128-Word FIFOs RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| MAX14830EVKIT# | 功能描述:界面开发工具 MAX14830 Eval Kit RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| MAX14830EVKIT+ | 制造商:Maxim Integrated Products 功能描述:QUAD UART EV-KIT WITH IO-LINK AND MULTIPROTOCOL - Boxed Product (Development Kits) |
| MAX1483C/D+ | 功能描述:RS-485接口IC low-power transceivers for RS-485 and RS-422 communication RoHS:否 制造商:Texas Instruments 数据速率:250 Kbps 工作电源电压:3.3 V 电源电流:750 uA 工作温度范围:- 40 C to + 125 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
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