参数资料
型号: MAX14830ETM+
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: 微控制器/微处理器
英文描述: SERIAL COMM CONTROLLER, QCC48
封装: 7 X 7 MM, ROHS COMPLIANT, TQFN-48
文件页数: 46/68页
文件大小: 2356K
代理商: MAX14830ETM+
MAX14830
Quad Serial UART with 128-Word FIFOs
and Internal Oscillator
50
GPIOData—GPIO Data Register
Bits 7–4: GPI[n]Dat
Each UART has four individually assigned GPIO outputs as follows: UART0: GPIO0–GPIO3, UART1: GPIO4–GPIO7,
UART2: GPIO8–GPIO11, UART3: GPIO12–GPIO15. For example, for UART0: Bit 4 is GPI0Dat, Bit 5 is GPI1Dat, Bit 6 is
GPI2Dat, and Bit 7 is GPI3Dat (see Table 6).
The GPI[n]Dat bits reflect the logic on the GPIO_s.
Bits 3–0: GPO[n]Dat
Each UART has four individually assigned GPIO outputs as follows: UART0: GPIO0–GPIO3, UART1: GPIO4–GPIO7,
UART2: GPIO8–GPIO11, UART3: GPIO12–GPIO15. For example, for UART0: Bit 0 is GPO0Dat, Bit 1 is GPO1Dat, Bit
2 is GPO2Dat, and Bit 3 is GPO3Dat (see Table 6).
The GPO[n]Dat bits allow programming the logic state of the GPIO_, when configured as outputs in GPIOConfg[3:0].
For open-drain operation, pullup resistors are needed on GPIO_.
Table 6. UART GPIO Assignments for GPIO Input/Output Data
ADDRESS:
0x19
MODE:
R/W
BIT
7
6
5
4
3
2
1
0
NAME
GPI3Dat
GPI2Dat
GPI1Dat
GPI0Dat
GPO3Dat
GPO2Dat
GPO1Dat
GPO0Dat
RESET
0
UART
GPI3Dat/GPO3Dat
GPI2Dat/GPO2Dat
GPI1Dat/GPO1Dat
GPI0Dat/GPO0Dat
UART0
GPIO3
GPIO2
GPIO1
GPIO0
UART1
GPIO7
GPIO6
GPIO5
GPIO4
UART2
GPIO11
GPIO10
GPIO9
GPIO8
UART3
GPIO15
GPIO14
GPIO13
GPIO12
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