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| 型号： | MAX1545ETL+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 34/43页 |
| 文件大小： | 0K |
| 描述： | IC QUICK-PWM DUAL-PHASE 40-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 系列： | Quick-PWM™ |
| 应用： | 控制器，Intel Pentium? IV |
| 输入电压： | 2 V ~ 28 V |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 1.85 V |
| 工作温度： | -40°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 供应商设备封装： | 40-TQFN-EP（6x6） |
| 包装： | 带卷 (TR) |
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Dual-Phase, Quick-PWM Controllers for
Programmable CPU Core Power Supplies
? ?
I RMS = ?
η OUTPH V OUT ( V IN ? η OUTPH V OUT )
?
? ? I
? V
PD ( N H RESISTIVE ) = ? OUT ? ? LOAD ? R DS ( ON )
? ? I
? C f
PD ( N H SWITCHING ) = ( V IN ( MAX ) ) 2 ? RSS SW ? ? LOAD ?
Input Capacitor Selection
The input capacitor must meet the ripple current
requirement (I RMS ) imposed by the switching currents.
The multiphase Quick-PWM controllers operate out-of-
phase, while the Quick-PWM slave controllers provide
selectable out-of-phase or in-phase on-time triggering.
Out-of-phase operation reduces the RMS input current
by dividing the input current between several stag-
gered stages. For duty cycles less than 100%/ η OUTPH
per phase, the I RMS requirements may be determined
by the following equation:
I LOAD
? η OUTPH V IN ?
where η OUTPH is the total number of out-of-phase switch-
ing regulators. The worst-case RMS current requirement
occurs when operating with V IN = 2 η OUTPH V OUT . At this
point, the above equation simplifies to I RMS = 0.5 ×
I LOAD / η OUTPH .
For most applications, nontantalum chemistries (ceramic,
aluminum, or OS-CON?) are preferred due to their resis-
tance to inrush surge currents typical of systems with a
mechanical switch or connector in series with the input. If
the Quick-PWM controller is operated as the second
stage of a two-stage power-conversion system, tantalum
input capacitors are acceptable. In either configuration,
choose an input capacitor that exhibits less than 10 ° C
temperature rise at the RMS input current for optimal cir-
cuit longevity.
Power MOSFET Selection
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
when using high-voltage (>20V) AC adapters. Low-cur-
rent applications usually require less attention.
The high-side MOSFET (N H ) must be able to dissipate
the resistive losses plus the switching losses at both
V IN(MIN) and V IN(MAX) . Calculate both of these sums.
Ideally, the losses at V IN(MIN) should be roughly equal to
losses at V IN(MAX) , with lower losses in between. If the
losses at V IN(MIN) are significantly higher than the losses
at V IN(MAX) , consider increasing the size of N H (reducing
R DS(ON) but with higher C GATE ). Conversely, if the losses
at V IN(MAX) are significantly higher than the losses at
V IN(MIN) , consider reducing the size of N H (increasing
R DS(ON) to lower C GATE ). If V IN does not vary over a wide
range, the minimum power dissipation occurs where the
resistive losses equal the switching losses.
Choose a low-side MOSFET that has the lowest possi-
ble on-resistance (R DS(ON) ), comes in a moderate-
OS-CON is a trademark of Sanyo.
sized package (i.e., one or two SO-8s, DPAK, or
D 2 PAK), and is reasonably priced. Ensure that the DL
gate driver can supply sufficient current to support the
gate charge and the current injected into the parasitic
gate-to-drain capacitor caused by the high-side MOSFET
turning on; otherwise, cross-conduction problems can
occur (see the MOSFET Gate Driver section).
MOSFET Power Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N H ), the worst-
case power dissipation due to resistance occurs at the
minimum input voltage:
? 2
? V IN ? ? η TOTAL ?
where η TOTAL is the total number of phases.
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the R DS(ON) required to stay within package
power dissipation often limits how small the MOSFETs
can be. Again, the optimum occurs when the switching
losses equal the conduction (R DS(ON) ) losses. High-
side switching losses do not usually become an issue
until the input is greater than approximately 15V.
Calculating the power dissipation in high-side
MOSFETs (N H ) due to switching losses is difficult since
it must allow for difficult quantifying factors that influ-
ence the turn-on and turn-off times. These factors
include the internal gate resistance, gate charge,
threshold voltage, source inductance, and PC board
layout characteristics. The following switching-loss cal-
culation provides only a very rough estimate and is no
substitute for breadboard evaluation, preferably includ-
ing verification using a thermocouple mounted on N H :
?
? I GATE ? ? η TOTAL ?
where C RSS is the reverse transfer capacitance of N H and
I GATE is the peak gate-drive source/sink current (1A, typ).
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied, due to the squared term in the C
× V IN 2 × f SW switching-loss equation. If the high-side
MOSFET chosen for adequate R DS(ON) at low battery
voltages becomes extraordinarily hot when biased from
V IN(MAX) , consider choosing another MOSFET with
lower parasitic capacitance.
34
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