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| 型号： | MAX1545ETL+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 4/43页 |
| 文件大小： | 0K |
| 描述： | IC QUICK-PWM DUAL-PHASE 40-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 系列： | Quick-PWM™ |
| 应用： | 控制器，Intel Pentium? IV |
| 输入电压： | 2 V ~ 28 V |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 1.85 V |
| 工作温度： | -40°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 供应商设备封装： | 40-TQFN-EP（6x6） |
| 包装： | 带卷 (TR) |
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Dual-Phase, Quick-PWM Controllers for
Programmable CPU Core Power Supplies
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V+ = 15V, V CC = V DD = V SHDN = V TON = V SKIP = V S0 = V S1 = V CODE = 5V, V FB = V CMP = V CMN = V CSP = V CSN
= 1.3V, OFS = SUS = GNDS = D0–D4 = GND; T A = 0°C to +85°C , unless otherwise specified. Typical values are at T A = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Output Undervoltage Fault and
Measured from the time when FB reaches
VROK Transition Blanking Time
t BLANK
the voltage set by the DAC code; clock
24
Clks
(Note 4)
speed set by R TIME
Measured from the time when FB first
VROK Startup Delay
reaches the voltage set by the DAC code
3
5
7
ms
after startup
VROK Delay
VROK Output Low Voltage
VROK Leakage Current
t VROK
FB forced 2% outside the VROK trip
threshold
I SINK = 3mA
High state, VROK forced to 5.5V
10
0.4
1
μs
V
μA
V CC Undervoltage Lockout
Threshold
Thermal-Shutdown Threshold
V UVLO(VCC)
T SHDN
Rising edge, hysteresis = 90mV, PWM
disabled below this level
Hysteresis = 10°C
4.0
4.25
160
4.4
V
° C
CURRENT LIMIT AND BALANCE
Current-Limit Threshold Voltage
(Positive, Default)
V LIMIT
CMP - CMN, CSP - CSN; ILIM = V CC
28
30
32
mV
Current-Limit Threshold Voltage
(Positive, Adjustable)
V LIMIT
CMP - CMN,
CSP - CSN
V ILIM = 0.2V
V ILIM = 1.5V
8
73
10
75
12
77
mV
Current-Limit Threshold Voltage
(Negative)
Current-Limit Threshold Voltage
(Zero Crossing)
V LIMIT(NEG)
V ZERO
CMP - CMN, CSP - CSN; ILIM = V CC ,
SKIP = V CC
CMP - CMN, CSP - CSN; SKIP = GND
-41
-36
1.5
-31
mV
mV
CMP, CMN, CSP, CSN Input
Ranges
0
2
V
CMP, CMN, CSP, CSN Input
Current
V CSP = V CSN = 0 to 5V
-2
+2
μA
Secondary Driver-Disable
Threshold
ILIM Input Current
Current-Limit Default Switchover
Threshold
V CSP
I ILIM
V ILIM
V ILIM = 0 to 5V
3
3
V CC - 1
0.1
V CC - 1
V CC -
0.4
200
V CC -
0.4
V
nA
V
(V CMP - V CMN ) - (V CSP - V CSN ); I CCI = 0,
Current-Balance Offset
V OS(IBAL)
-20mV < (V CMP - V CMN ) < 20mV,
-2
+2
mV
1.0V < V CCI < 2.0V
Current-Balance
Transconductance
G m(IBAL)
400
μS
4
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