参数资料
型号: MAX9979EVKIT+
厂商: Maxim Integrated Products
文件页数: 47/60页
文件大小: 0K
描述: EVAL KIT MAX9979
标准包装: 1
系列: *
Dual 1.1Gbps Pin Electronics with Integrated
PMU and Level-Setting DACs
clock speeds up to 50MHz and includes the signals CS ,
V DUT
6.5V
4.5V (A)
6.1V (B–E)
I DUT_
1.1V (A)
-1.1V (B–E)
-1.5V
SCLK, DIN, RST , LOAD , and DOUT. Serial-interface tim-
ing is shown in Figure 9 and timing specifications are
detailed in the Electrical Characteristics section.
Loading Data into the MAX9979
Load data into the 24-bit shift register from DIN on the
rising edge of SCLK, while CS is low (Figure 8). The
MAX9979 is updated when the control and level-setting
data are latched into the control and level-setting regis-
ters. The control and level-setting registers are separated
from the shift register by the input and channel-select
registers. Two methods allow data to transfer from the
shift register to the control and level-setting registers,
depending on the state of external digital input LOAD .
-FSR/2
+FSR/2
Holding LOAD high during the rising edge of CS allows
the shift register data to transfer only into the input and
Figure 7. Output-Voltage Range
Serial Interface
An SPI-compatible serial interface and the logic-con-
trolled inputs shown in Table 1 control the MAX9979.
channel-select registers. Force LOAD low to transfer
the data into the control and level-setting registers.
Changes update on the falling edge of LOAD , which
allows preloading of data and facilitates synchronizing
updates across multiple devices.
The serial interface, detailed in Figure 8, operates with
MAX9979
SCLK
DIN
LOAD
CS
RST
SHIFT REGISTER
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 A0 A1 A2 A3 A4 A5 A6 A7
16
8
DOUT
INPUT REGISTERS
CHANNEL-SELECT
REGISTER
PMU CONTROL
REGISTER
Figure 8. Serial-Interface Block Diagram
DCL CONTROL
REGISTER
LEVEL-SETTING DACs
AND DAC CALIBRATION REGISTERS
______________________________________________________________________________________
47
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