参数资料
型号: MAX9979EVKIT+
厂商: Maxim Integrated Products
文件页数: 56/60页
文件大小: 0K
描述: EVAL KIT MAX9979
标准包装: 1
系列: *
Dual 1.1Gbps Pin Electronics with Integrated
PMU and Level-Setting DACs
An example calibration sequence follows:
1) Power up the MAX9979. This sets the level-setting
DACs to their default 0V values, and the gain and
offset calibration registers to their default midscale
values (Table 20).
2) Gain calibration (gain must be calibrated before
calibrating offset).
a. Program a level-setting DAC to its minimum
value and measure the output voltage
(V OUT_MIN ). Then, reprogram the DAC to its
maximum value and again measure the output
voltage (V OUT_MAX ). Calculate the gain using
the following equation:
3) Offset calibration (must be done after the gain cali-
bration).
a. Set the level of the DAC to the desired offset
calibration point (e.g., midscale).
b. Measure V OUT_ and compare it to the expect-
ed output.
c. Adjust the offset calibration register until
V OUT_ is as close as possible to the expected
voltage. Record the value of the offset calibra-
tion register for later use.
4) Repeat the above procedure for all DACs that need
calibration, recording each of the gain and offset
calibration register settings for later use.
GAIN =
V OUT _ MAX ? V OUT _ MIN
V SET _ MAX ? V SET _ MIN
The prior procedure only needs to be done once. Each
time the power is cycled, simply reprogram the gain
and offset registers using the recorded values.
where V SET_MAX and V SET_MIN are the desired gain
calibration points.
b. Set the DACs gain calibration register until the
Table 22 presents the mode settings required to access
the calibration registers of the shared DACs. In some
cases there is more than one way to access the register.
gain is as close to 1 as possible. This cali-
brates the gain for the DAC. Record the gain
calibration register value for later use.
Table 22. Mode-Control Settings to Access Calibration Registers of Shared DACs
CALIBRATION REGISTER
SERIAL-INTERFACE BITS
DAC
CLV_, CHV_
IVMAX_, IVMIN_
CLAMPHI_
VHH_
VIN_
MODE
Window
Differential
FV*
FI Range A
FI Range B*
FI Range C*
FI Range D*
FI Range E*
HIZFORCE_
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
DIFFERENTIAL1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
FMODE_
X
X
X
X
X
X
0
1
X
X
1
X
1
X
1
X
1
MMODE_
X
X
X
X
X
0
X
X
1
1
X
1
X
1
X
1
X
2
X
X
X
X
X
X
1
1
0
0
0
0
RS_ BIT
1
X
X
X
X
X
X
X
X
1
1
0
0
0
X
X
X
X
X
X
X
X
1
0
1
0
*Any of these conditions allow access to the calibration register.
56
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