参数资料
型号: MC74AC00DT
厂商: ON SEMICONDUCTOR
元件分类: 门电路
英文描述: AC SERIES, QUAD 2-INPUT NAND GATE, PDSO14
封装: PLASTIC, TSSOP-14
文件页数: 18/45页
文件大小: 434K
代理商: MC74AC00DT
http://onsemi.com
29
form in the bond area resulting in high impedance contacts
and degradation of device performance. Since the formation
of intermetallic compounds is directly related to device
junction temperature, it is incumbent on the designer to
determine that the device junction temperatures are
consistent with system reliability goals.
Predicting Bond Failure Time
Based on the results of almost ten (10) years of +125
°C
operating life testing, a special arrhenius equation has been
developed to show the relationship between junction
temperature and reliability.
(1) T = (6.376
× 10–9)e
11554.267
273.15 + TJ
Where: T
= Time in hours to 0.1% bond failure
(1 failure per 1,000 bonds).
TJ
= Device junction temperature,
°C.
And:
(2) TJ = TA + PDθJA = TA + TJ
Where: TJ
= Device junction temperature,
°C.
TA
= Ambient temperature,
°C.
PD
= Device power dissipation in watts.
θJA = Device thermal resistance, junction to air,
°C/Watt.
TJ = Increase in junction temperature due to
on-chip power dissipation.
Figure 1–31 shows the relationship between junction
temperature, and continuous operating time to 0.1% bond
failure, (1 failure per 1,000 bonds).
Junction
Temperature
°C
Time, Hours
Time, Years
80
1,032,200
117.8
90
419,300
47.9
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
Figure 1–31. Device Junction Temperature versus
Time to 0.1% Bond Failures
Figure 1–31 is graphically illustrated in Figure 1–32
which shows that the reliability for plastic and ceramic
devices is the same until elevated junction temperatures
induce intermetallic failures in plastic devices. Early and
mid-life failure rates of plastic devices are not effected by
this intermetallic mechanism.
1
10
100
1000
TIME, YEARS
NORMALIZED
F
AILURE
RA
TE
Figure 1–32. Failure Rate versus Time
Junction Temperature
T J
=80
T J
=90
T J
=100
T J
=1
10
T J
=130
T J
=120
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Procedure
After the desired system failure rate has been established
for failure mechanisms other than intermetallics, each
device in the system should be evaluated for maximum
junction temperature. Knowing the maximum junction
temperature, refer to Figure 1–31 or Equation 1 to determine
the continuous operating time required to 0.1% bond
failures due to intermetallic formation. At this time, system
reliability departs from the desired value as indicated in
Figure 1–32.
Air flow is one method of thermal management which
should be considered for system longevity. Other commonly
used methods include heat sinks for higher powered devices,
refrigerated air flow and lower density board stuffing. Since
θCA is entirely dependent on the application, it is the
responsibility of the designer to determine its value. This can
be achieved by various techniques including simulation,
modeling, actual measurement, etc.
The material presented here emphasizes the need to
consider thermal management as an integral part of system
design and also the tools to determine if the management
methods being considered are adequate to produce the
desired system reliability.
Interfacing
FACT devices have outputs which combine balanced
CMOS outputs with high current line driving capability.
Each standard output is guaranteed to source or sink 24 mA
of current at worst case conditions. This allows FACT
circuits to drive more loads than standard advanced
Schottky parts; FACT can directly drive ALS, AS, LS, HC
and HCT devices.
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