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Section 3 – Ratings, Specifications and Waveforms
Specifying FACT Devices
Traditionally, when a semiconductor manufacturer
completed a new device for introduction, specifications
were based on the characterization of just a few parts. While
these specifications were appealing to the designer, they
were often too tight and, over time, the IC manufacturers had
difficulty producing devices to the original specs. This
forced the manufacturer to relax circuit specifications to
reflect the actual performance of the device.
As a result, designers were required to review system
designs to ensure the system would remain reliable with the
new specifications. ON Semiconductor realized and
understood the problems associated with characterizing
devices too aggressively.
To provide more realistic and manufacturable specs, ON
Semiconductor devised a systematic and thorough process
to generate specifications. Devices are selected from
multiple wafer lots to ensure process variations are taken
into account. In addition, the process parameters are
measured and compared to the known process limits.
This method of characterizing parts more accurately
represents the product across time, voltage, temperature and
process rather than portraying the fastest possible device.
FACT
circuits
are
therefore
guaranteed
to
be
manufacturable over time without the need to respecify
timing.
These specification guidelines allow designers to design
systems more efficiently since the devices used will behave
as documented. Unspecified guardbands no longer need to
be added by the designer to ensure system reliability.
Power Dissipation – Test Philosophy
In an effort to reduce confusion about measuring CPD, a
JEDEC standard test procedure (per JEDEC, Appendix E)
has been adopted which specifies the test setup for each type
of device. This allows a device to be exercised in a consistent
manner for the purpose of specification comparison. All
device measurements are made with VCC = 5 V at 25°C, with
3-state outputs both enabled and disabled.
Gates – Switch one input. Bias the remaining inputs such
that the output switches.
Latches – Switch the Enable and D inputs such that the latch
toggles.
Flip-Flops – Switch the clock pin while changing D (or bias
J and K) such that the output(s) change each clock cycle. For
parts with a common clock, exercise only one flip-flop.
Decoders – Switch one address pin which changes two
outputs.
Multiplexers
–
Switch
one
address
pin
with
the
corresponding data inputs at opposite logic levels so that the
output switches.
Counters – Switch the clock pin with other inputs biased
such that the device counts.
Shift Registers – Switch the clock pin with other inputs
biased such that the device counts.
Transceivers – Switch one data input. For bidirectional
devices enable only one direction.
Parity Generator – Switch one input.
Priority Encoders – Switch the lowest priority input.
Load Capacitance – Each output which is switching should
be loaded with the standard 50 pF.
If the device is tested at a high enough frequency, the static
supply current can be ignored. Thus at 1 MHz, the following
formula can be used to calculate CPD:
CPD = ICC/(VCC) (1 × 106) – Equivalent Load Capacitance
Ratings and Specifications
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
–0.5 to +7.0
V
Vin
DC Input Voltage (Referenced to GND)
–0.5 to VCC +0.5
V
Vout
DC Output Voltage (Referenced to GND)
–0.5 to VCC +0.5
V
Iin
DC Input Current, per Pin
±20
mA
Iout
DC Output Source/Sink Current, per Pin
±50
mA
ICC
DC VCC or GND Current per Output Pin
±50
mA
Tstg
Storage Temperature
–65 to +150
°C
1Absolute maximum ratings are those values beyond which damage to the device may occur. Obviously the databook specifications should
be met, without exception to ensure that the system design is reliable over its power supply, temperature, output/input loading variables.
ON Semiconductor does not recommend operation of FACT circuits outside databook specifications.