参数资料
型号: MCF5235CVM100
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 100 MHz, RISC PROCESSOR, PBGA256
封装: MAPBGA-256
文件页数: 75/76页
文件大小: 2665K
代理商: MCF5235CVM100
8
MCF523x Integrated Microprocessor Hardware Specifications
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Features
— Auto-alignment transfers supported for efficient block movement
— Bursting and cycle steal support
— Software-programmable connections between the 12 DMA requesters in the UARTs (3),
32-bit timers (4) plus external logic (4) the four DMA channels and the eTPU (1)
External Bus Interface
— Glueless connections to external memory devices (e.g., SRAM, Flash, ROM, etc.)
— SDRAM controller supports 8-, 16-, and 32-bit wide memory devices
— Support for n-1-1-1 burst fetches from page mode Flash
— Glueless interface to SRAM devices with or without byte strobe inputs
— Programmable wait state generator
— 32-bit bidirectional data bus
— 24-bit address bus
— Up to eight chip selects available
— Byte/write enables (byte strobes)
— Ability to boot from external memories that are 8, 16, or 32 bits wide
Chip Integration Module (CIM)
— System configuration during reset
— Selects one of four clock modes
— Sets boot device and its data port width
— Configures output pad drive strength
— Unique part identification number and part revision number
— Reset
– Separate reset in and reset out signals
– Six sources of reset: Power-on reset (POR), External, Software, Watchdog, PLL loss of
clock, PLL loss of lock
– Status flag indication of source of last reset
General Purpose I/O interface
— Up to 142 bits of general purpose I/O
— Bit manipulation supported via set/clear functions
— Unused peripheral pins may be used as extra GPIO
JTAG support for system level board testing
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相关代理商/技术参数
参数描述
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