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参数资料
| 型号： | MPC180LMB |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | MICROPROCESSOR, PQFP100 |
| 封装： | LQFP-100 |
| 文件页数： | 10/28页 |
| 文件大小： | 356K |
| 代理商： | MPC180LMB |
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18
MPC180 Hardware Reference Manual
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
System Timing Analysis
An important note is that the hold time margin is not directly frequency dependent. It will only vary with
frequency if the hold time specications for either the driver or receiver vary with frequency.
NOTE
The value of the clock offset will be positive when the MPC180 is the
receiver and the offset will have a net additive effect. The value of the clock
offset will be negative when the host processor is the receiver and the offset
will have a net subtractive effect.
7.3 Timing Analysis with the MPC850, MPC860 and MPC8260
without Clock Offset
We will now use the equations that were previously developed to compute the setup and hold time margin
for both read and write cycles without clock offsets. The analysis will rst look at the MPC180 input setup
margin, then the MPC180 input hold margin. Next, the host processor input setup margin will be calculated
and nally the hold time to the host processor will be computed. The following assumptions will be used
throughout this portion of the analysis:
tperiod = 20 nS for the MPC850 and MPC860
tperiod = 15 nS for the MPC8260
tclock_skew = 0.9 nS
tclock_offset = 0.0 nS for this portion of the analysis
The input setup time margin is calculated for when the host processor is the source of the signal and the
MPC180 is the receiver. The results are shown in Table 9.
The input hold time margin will now be calculated for when the host processor is the source of the signal
and the MPC180 is the receiver. The results are shown in Table 10.
Table 9. MPC180 Input Setup Margin without Clock Offset
Signal
MPC180 Input
Setup Time
MCP850
Access Time
MPC860
Access Time
MPC8260
Access Time
Input Setup
Margin with
MPC850
Input Setup
Margin with
MPC860
Input Setup
Margin with
MPC8260
A[18:29]
1.0 nS
12.0 nS
11.75 nS
8.0 nS
6.1 nS
6.35 nS
5.1 nS
ENDIAN
1.0 nS
12.0 nS
11.75 nS
8.0 nS
6.1 nS
6.35 nS
5.1 nS
D[0:31]
1.0 nS
12.0 nS
11.75 nS
8.0 nS
6.1 nS
6.35 nS
5.1 nS
CS
1.1 nS
13.0 nS
11.75 nS
6.0 nS
5.0 nS
6.25 nS
7.0 nS
R/W
1.0 nS
12.0 nS
11.75 nS
6.0 nS
6.1 nS
6.35 nS
7.1 nS
BURST
1.0 nS
—
6.0 nS
—
7.1 nS
TS
1.0 nS
12.25 nS
11.0 nS
—
5.85 nS
7.1 nS
—
PSDVAL
1.0 nS
—
10.0 nS
—
3.1 nS
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