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参数资料
| 型号： | MPC180LMB |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | MICROPROCESSOR, PQFP100 |
| 封装： | LQFP-100 |
| 文件页数： | 16/28页 |
| 文件大小： | 356K |
| 代理商： | MPC180LMB |
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MOTOROLA
MPC180 Hardware Reference Manual
23
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
System Timing Analysis
The input setup margin is now translated into a maximum length restriction. The value is calculated for
when the MPC180 is the source of the signal and the host processor is the receiver. The value physically
represents the maximum distance in inches that should exist between the output pin of the MPC180 to the
input pin of the host processor. The results are shown in Table 19.
This analysis shows that the trace that should be most optimized is the TA path. One note is that this analysis
assumes that all sources are driving a 50pF load. Load delay can have a signicant impact on timing margin
and length restrictions. If this analysis was to assume that the source was to drive a lighter load, the PCB
designer would reclaim approximately 1.9 inches per 10pF of loading. The maximum PCB length
restrictions are shown in Table 20for a 30pF environment for comparison.
From the previous section where the timing analysis with clock offset was performed, the results show that
all of the input hold margins are positive. The input hold margin denes the minimum propagation length.
Positive hold margin translates into negative minimum propagation delay. Since no trace can have negative
propagation delay time, the actual hold margin will be the previously calculated hold margin plus the trace
delay of the shortest signal in a given signal group. In this analysis, the minimum PCB length restrictions
are all zero and are shown in Table 21 for completeness.
R/W
0.0 in
BURST
—
0.0 in
TA / LUPMWAIT
0.0 in
—
PSDVAL
—
0.0 in
Table 19. Maximum PCB Length Restriction (50pF load)
Signal
Input Setup Margin
to MPC850
Input Setup Margin
to MPC860
Input Setup Margin
to MPC8260
D[0:31]
26.3 in
6.6 in
TA / LUPMWAIT
7.7 in
3.3 in
DREQx
—
10.0 in
Table 20. Maximum PCB Length Restriction (30pF load)
Signal
Input Setup Margin
to MPC850
Input Setup Margin
to MPC860
Input Setup Margin
to MPC8260
D[0:31]
30.1 in
10.4 in
TA / LUPMWAIT
11.5 in
7.1 in
DREQx
—
13.8 in
Table 18. Minimum PCB Length Restriction (continued)
Signal
Input Hold Margin
with MPC850
Input Hold Margin
with MPC860
Input Hold Margin
with MPC8260
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| MPC184VMB | 功能描述:微处理器 - MPU SECURITY CO-PRCSR RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
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