MOTOROLA
Chapter 17. Modular Input/Output Subsystem (MIOS14)
17-49
MIOS14 Pulse Width Modulation Submodule (MPWMSM)
– Maximum output frequency at fSYS = 40 MHz with 8 bits of resolution and
divide-by-2 prescaler selection: 78125 Hz (12.8
s.)
– Minimum output frequency at fSYS = 40 MHz with 8 bits of resolution and
divide-by-4096 prescaler selection: 38.15 Hz (26.2 ms.)
Programmable duty cycle from 0% to 100%
Possible interrupt generation at start of every period
Software selectable output pulse polarity
Software readable output signal status
Possible use of signal as I/O port when PWM function is not needed
17.10.3
MPWMSM Description
The purpose of the MPWMSM is to create a variable pulse width output signal at a wide
range of frequencies, independently of other MIOS14 output signals. The MPWMSM
includes its own counter, and thus does not use the MIOS14 counter bus set. However the
MPWMSM uses the prescaled clock bus that originates in the MIOS14 counter prescaler
submodule (MCPSM). The MPWMSM pulse width can vary from 0% to 100%, with up to
16 bits of resolution. The finest output resolution is the MIOS14 CLOCK period multiplied
by two (for a MIOS14 CLOCK with fSYS = 40 MHz, the finest output pulse width
resolution is 50 ns). With the full 16 bits of resolution and the MCPSM set to divide by two,
the period of the output signal can range from 3.276 ms to 6.71 s (assuming fSYS =
40 MHz).
By reducing the amount of bits of resolution, the output signal period can be reduced. For
example, the period can be as fast as 204.8
s (4882 Hz) with 12 bits of resolution, as fast
as 12.8
s (78.125 KHz) with eight bits of resolution, and as fast as 3.2 s (312.5 KHz)
with six bits of resolution (still assuming a fSYS = 40 MHz and the MCPSM set to divide
by two).
The MPWMSM is composed of:
An output flip-flop with output buffer and polarity control
An input/output signal with data direction control
An 8-bit prescaler and clock selection logic
A 16-bit down-counter (MPWMCNTR)
A register to hold the next period values (MPWMPERR)
Two registers to hold the current and next pulse width values (MPWMPULR)
A less-than or equal comparator
A status and control register (MPWMSCR)