MPC8313E-RDB (Freescale) PDF资料下载 Datasheet(33/99 页)

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型号：	MPC8313E-RDB
厂商：	Freescale Semiconductor
文件页数：	33/99页
文件大小：	0K
描述：	BOARD PROCESSOR
产品培训模块：	MPC8313E PowerQUICC Processor MPC8314/15 Product Overview
标准包装：	1
系列：	PowerQUICC II™ PRO
类型：	MCU
适用于相关产品：	MPC8313E
所含物品：	参考设计板、软件和说明文档
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MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4

Freescale Semiconductor

of the differential pair must have a single-ended swing less than 800 mV and greater than

200 mV. This requirement is the same for both external DC-coupled or AC-coupled

connection.

— For external DC-coupled connection, as described in Section 9.2.1, “SerDes Reference Clock

Receiver Characteristics,” the maximum average current requirements sets the requirement for

average voltage (common mode voltage) to be between 100 and 400 mV. Figure 24 shows the

SerDes reference clock input requirement for the DC-coupled connection scheme.

— For external AC-coupled connection, there is no common mode voltage requirement for the

clock driver. Since the external AC-coupling capacitor blocks the DC level, the clock driver

and the SerDes reference clock receiver operate in different command mode voltages. The

SerDes reference clock receiver in this connection scheme has its common mode voltage set to

XCOREVSS. Each signal wire of the differential inputs is allowed to swing below and above

the command mode voltage (XCOREVSS). Figure 25 shows the SerDes reference clock input

requirement for AC-coupled connection scheme.

Single-ended mode

— The reference clock can also be single-ended. The SD_REF_CLK input amplitude

(single-ended swing) must be between 400 and 800 mV peak-to-peak (from Vmin to Vmax) with

SD_REF_CLK either left unconnected or tied to ground.

— The SD_REF_CLK input average voltage must be between 200 and 400 mV. Figure 26 shows

the SerDes reference clock input requirement for the single-ended signaling mode.

— To meet the input amplitude requirement, the reference clock inputs might need to be DC or

AC coupled externally. For the best noise performance, the reference of the clock could be DC

or AC coupled into the unused phase (SD_REF_CLK) through the same source impedance as

the clock input (SD_REF_CLK) in use.

Figure 24. Differential Reference Clock Input DC Requirements (External DC-Coupled)

SD_REF_CLK

Vmax < 800 mV

Vmin > 0 V

100 mV < Vcm < 400 mV

200 mV < Input Amplitude or Differential Peak < 800 mV

相关代理商/技术参数	参数描述
MPC8313E-RDBB	功能描述:开发板和工具包 - 其他处理器 CPU BOARD VER 2.1 RoHS:否制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压:
MPC8313E-RDBB	制造商:Freescale Semiconductor 功能描述:; LEADED PROCESS COMPATIBLE:YES; PEAK RE
MPC8313E-RDBC	功能描述:开发板和工具包 - 其他处理器 8313E CPU board Ver 2.2 RoHS:否制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压:
MPC8313EVRADD	制造商:Freescale Semiconductor 功能描述:MPC83XX RISC 32-BIT 90NM 333MHZ 1V/1.8V/2.5V/3.3V 516-PIN TE - Trays
MPC8313EVRADDB	功能描述:微处理器 - MPU PBGA W/ ENCR RoHS:否制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324

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