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| 型号： | MSC8144ADS |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 37/80页 |
| 文件大小： | 0K |
| 描述： | ADS FOR MSC8144 DEVICE |
| 标准包装： | 1 |
| 类型： | DSP |
| 适用于相关产品： | MSC8144 |
| 所含物品： | AMC 卡、电源、缆线、USB TAP、硬件和说明文档 |
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Electrical Characteristics
Table 18. Reset Actions for Each Reset Source (continued)
Reset Action/Reset Source
Power-On Reset
(PORESET)
Hard Reset (HRESET)
Soft Reset (SRESET)
External or Internal
External or
JTAG Command:
External only
(Software Watchdog,
Software or RapidIO)
internal
Software
EXTEST, CLAMP, or
HIGHZ
HRESET driven
IPBus modules reset (TDM, UART, SWT,
Yes
Yes
Yes
Yes
No
Yes
No
Yes
DDRC, IPBus master, GIC, HS, and GPIO)
SRESET driven
Extended cores reset
CLASS registers reset
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Some
Depends on command
Yes
Some registers
registers
Timers, Performance Monitor
QUICC Engine subsystem, PCI, DMA
Yes
Yes
Yes
Yes
No
Most
No
Most registers
registers
2.6.3.1
Power-On Reset (PORESET) Pin
Asserting PORESET initiates the power-on reset flow. PORESET must be asserted externally for at least 32 CLKIN cycles after
V DD and V DDIO are both at their nominal levels.
2.6.3.2
Reset Configuration
The MSC8144 has two mechanisms for writing the reset configuration:
?
?
?
Through the I 2 C port
Through external pins
Through internal hard coded
Twenty-three signals (see Section 1 for signal description details) are sampled during the power-on reset sequence to define the
Reset Word Configuration Source and operating conditions:
?
?
RCW_SRC[2–0]
RC[16–0]
The RCFG_CLKIN_RNG pin must be valid during power-on or hard reset sequence. The STOP_BS pin must be always valid
and is also sampled during power-on reset sequence for RCW loading from an I 2 C EEPROM.
2.6.3.3 Reset Timing Tables
Table 19 and Figure 7 describe the reset timing for a reset configuration.
Table 19. Timing for a Reset Configuration Write
No.
Characteristics
Expression
Max
Min
Unit
1
Required external PORESET duration minimum
32/CLKIN
? 33 MHz <= CLKIN < 44 MHz
? 44 MHz <= CLKIN < 66 MHz
? 66 MHz <= CLKIN < 100 MHz
? 100 MHz <= CLKIN < 133 MHz
1280
728
485
320
727
484
320
241
ns
ns
ns
ns
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 16
Freescale Semiconductor
37
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相关代理商/技术参数 |
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| MSC8144AMC-SA | 制造商:Freescale Semiconductor 功能描述:BOARD AMC SGL WIDTH MSC8144 DSP |
| MSC8144E | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Quad Core Digital Signal Processor |
| MSC8144EC | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Quad Core Digital Signal Processor |
| MSC8144ESVT1000B | 制造商:Freescale Semiconductor 功能描述:DSP 32-BIT 1GHZ 1000MIPS 783-PIN FCBGA BOX - Trays 制造商:Freescale Semiconductor 功能描述:ENCRYPTION PACSUN R2.1 783FCPBGA |
| MSC8144ESVT800A | 制造商:Freescale Semiconductor 功能描述:DSP 32BIT 800MHZ 800MIPS 783FCBGA - Trays |
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