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参数资料
型号： MSC8144ADS
厂商： Freescale Semiconductor
文件页数： 79/80页
文件大小： 0K
描述： ADS FOR MSC8144 DEVICE
标准包装： 1
类型： DSP
适用于相关产品： MSC8144
所含物品： AMC 卡、电源、缆线、USB TAP、硬件和说明文档
Revision History
Table 66. Document Revision History (continued)
Rev.
Date
Description
7
Dec 2007
?
?
?
?
Changed minimum voltage level for V DDM3 to 1.213 (1.25 – 3%) in Table 3 .
Added POS to titles in Section 2.6.6 .
Added additional signals to titles in Section 2.6.8 . Added high and low voltage ranges to Table 19 .
Added ATM and POS to headings in Section 2.7.11 . Changed characteristics to generic input/output in Table 52 ,
Figure 33 , and Figure 34 .
? Replaced Sections 2.7.13 and 2.7.14 with new Section 2.7.13 , Asynchronous Signal Timing . Renumbered
subsequent sections, tables, and figures.
? Added POS to all UTOPIA references in Section 3.4.5 .
8
9
10
Dec 2007
Mar 2008
Apr 2008
? Changed GCR4 program value to 0x0004C130 in Note 7 in Table 51 .
? Changed description of Table 20 in Section 2.7.2 .
? Added 3 to the PLL supply voltage row in Table 2 .
? Changed the first sentence in Section 3.4.8 to reflect that Table 70 indicates what to do with pins if they are
“not” required by the design. Changed the Pin Connection for GPIO[0–31] to GND.
? Updated ordering information in Section 4 .
? Multiple corrections of minor punctuation errors.
11
Aug 2008
?
?
?
?
?
Removed the comment about preliminary estimates before Table 4 and removed non-DDR rows in the table.
Table 9 and Table 11 for DDR and DDR2 SDRAM capacitance removed and subsequent tables renumbered.
Changed units for I OH and I OL to mA in Table 9 .
Removed signal low and high input current from Table 12 .
Added a note to Table 15 to exclude TDM and TMS. Removed reference to overshoot and undershoot and
associated figure.
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
Changed minimum clock frequency to 33 MHz and maximum clock frequency to 133 MHz in Table 16 .
Deleted old Table 17 Clock Parameters.
Changed minimum input clock frequency to 33 MHz in Table 19 .
Changed the t DDKHAX minimum value in Table 23 to 1.85 ns.
Removed t REFPJ and t REFCJ from Table 24 because the specifications are not required or tested.
Removed t PCRSTCLK , t PCRSTOFF , t PCRST , and t PCRHFA from Table 36 because the specifications are not required
or tested.
Removed t UAVKH and t UAVXH from Table 38 because the specifications are not required or tested.
The parameters t MDCH , t MDCR , and t MDHF were removed from Table 40 because the specifications are not
required or tested.
The parameters t MTXH /t MTX , t MTXR , and t MTXF were removed from Table 41 because the specifications are not
required or tested.
The parameters t MRXH /t MRX , t MRXR , and t MRXF were removed from Table 42 because the specifications are not
required or tested.
The parameters t RMXH /t RMX , t RMXR , and t RMXF were removed from Table 43 because the specifications are not
required or tested.
Removed the parameters t RGT , t RGTH /t RGT (1000Base-T), t RGTH /t RGT (10Base-T), t RGTR , t RGTF , t G12 , and
t G125H /t G125 were removed from Table 45 and Table 46 because the specifications are not required or tested.
Changed t UEKHOX to guaranteed by design in Table 47 .
Updated Figure 35 and Figure 36 SPI timing diagrams.
Removed TCK rise and fall time from Table 50 .
Updated orderable part numbers in Section 4 .
12
13
Aug 2008
Feb 2009
?
?
?
?
Changed b8t to bit in the M3 memory description on the first page.
Changed maximum input high voltage (VIH) for SPI to 3.465 in the first row of Table 14 .
Changed packet processor to QUICC Engine Subsystem in the last row of Table 18 .
In Figure 31 , for GTX_CLK, changed (at transmitter) to (at DSP) and for RX_CLK, changed (at PHY) to (at
DSP).
?
Updated package drawing to the latest revision, Case No. 1842-04 in Figure 44 .
14
15
16
Jul 2009
Nov 2009
May 2010
? Updated MV REF equations and temperature ranges in Table 3 .
? Updated orderable part numbers to Section 4 .
? Updated Core and PLL input voltage tolerance in Table 3 .
? Corrected typo in Table 23 . Changed MCLK minimum time to 5 ns.
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 16
Freescale Semiconductor
79
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