参数资料
型号: NAND256W3A2CZA1E
厂商: NUMONYX
元件分类: PROM
英文描述: 32M X 8 FLASH 3V PROM, 35 ns, PBGA55
封装: 8 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, VFBGA-55
文件页数: 56/57页
文件大小: 916K
代理商: NAND256W3A2CZA1E
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
8/57
Table 2. Product Description
Note: 1. Dual Die device.
Figure 2. Logic Diagram
Table 3. Signal Names
Reference
Part Number
Density
Bus
Width
Page
Size
Block
Size
Memory
Array
Operating
Voltage
Timings
Package
Random
Access
Max
Sequential
Access
Min
Page
Program
Typical
Block
Erase
Typical
NAND128-A
NAND128R3A
128Mbit
x8
512+16
Bytes
16K+512
Bytes
32 Pages x
1024 Blocks
1.7 to 1.95V
12s
60ns
200s
2ms
TSOP48
USOP48
VFBGA55
NAND128W3A
2.7 to 3.6V
12s
50ns
200s
NAND128R4A
x16
256+8
Words
8K+256
Words
1.7 to 1.95V
12s
60ns
200s
NAND128W4A
2.7 to 3.6V
12s
50ns
200s
NAND256-A
NAND256R3A
256Mbit
x8
512+16
Bytes
16K+512
Bytes
32 Pages x
2048 Blocks
1.7 to 1.95V
12s
60ns
200s
2ms
TSOP48
USOP48
VFBGA55
NAND256W3A
2.7 to 3.6V
12s
50ns
200s
NAND256R4A
x16
256+8
Words
8K+256
Words
1.7to 1.95V
12s
60ns
200s
NAND256W4A
2.7 to 3.6V
12s
50ns
200s
NAND512-A(1)
NAND512R3A
512Mbit
x8
512+16
Bytes
16K+512
Bytes
32 Pages x
4096 Blocks
1.7to 1.95V
12s
60ns
200s
2ms
TFBGA55
NAND512W3A
2.7 to 3.6V
12s
50ns
200s
NAND512R4A
x16
256+8
Words
8K+256
Words
1.7 to 1.95V
12s
60ns
200s
NAND512W4A
2.7 to 3.6V
12s
50ns
200s
NAND512-A
NAND512R3A
512Mbit
x8
512+16
Bytes
16K+512
Bytes
32 Pages x
4096 Blocks
1.7to 1.95V
15s
60ns
200s
2ms
TSOP48
USOP48
VFBGA63
NAND512W3A
2.7 to 3.6V
12s
50ns
200s
NAND512R4A
x16
256+8
Words
8K+256
Words
1.7 to 1.95V
15s
60ns
200s
NAND512W4A
2.7 to 3.6V
12s
50ns
200s
NAND01G-A
NAND01GR3A
1Gbit
x8
512+16
Bytes
16K+512
Bytes
32 Pages x
8192 Blocks
1.7 to 1.95V
15s
60ns
200s
2ms
TSOP48
TFBGA63
NAND01GW3A
2.7 to 3.6V
12s
50ns
200s
NAND01GR4A
x16
256+8
Words
8K+256
Words
1.7 to 1.95V
15s
60ns
200s
NAND01GW4A
2.7 to 3.6V
12s
50ns
200s
AI07557C
W
I/O8-I/O15, x16
VDD
NAND Flash
E
VSS
WP
AL
CL
RB
R
I/O0-I/O7, x8/x16
I/O8-15
Data Input/Outputs for x16 devices
I/O0-7
Data Input/Outputs, Address Inputs,
or Command Inputs for x8 and x16
devices
AL
Address Latch Enable
CL
Command Latch Enable
E
Chip Enable
R
Read Enable
RB
Ready/Busy (open-drain output)
W
Write Enable
WP
Write Protect
VDD
Supply Voltage
VSS
Ground
NC
Not Connected Internally
DU
Do Not Use
相关PDF资料
PDF描述
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