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| 型号： | NAND512W3A2SN6E |
| 元件分类： | PROM |
| 英文描述： | 64M X 8 FLASH 3V PROM, PDSO48 |
| 封装： | 12 X 20 MM, ROHS COMPLIANT, PLASTIC, TSOP-48 |
| 文件页数： | 5/51页 |
| 文件大小： | 1009K |
| 代理商： | NAND512W3A2SN6E |
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Numonyx SLC SP 70 nm
Signal descriptions
210403 - Rev 3
3
Signal descriptions
See Figure 1: Logic diagram, and Table 3: Signal names, for a brief overview of the signals
connected to the devices. Table 5 provides the detailed descriptions of the signals.
Table 5.
Signal descriptions
Symbol
Type
Description
Input/Output signals
I/O0-I/O7
Input/Output
Input/outputs 0 to 7 are used to input the selected address,
output the data during a read operation or input a
command or data during a write operation. The inputs are
latched on the rising edge of Write Enable. I/O0-I/O7 are
left floating when the device is deselected or the outputs
are disabled.
I/O8-I/O15
Input/Output
Input/outputs 8 to 15 are only available in x16 devices.
They are used to output the data during a read operation or
input data during a write operation. Command and address
inputs only require I/O0 to I/O7.
The inputs are latched on the rising edge of Write Enable.
I/O8-I/O15 are left floating when the device is deselected
or the outputs are disabled.
Control signals
AL
Input
The Address Latch Enable activates the latching of the
address inputs in the command interface. When AL is
High, the inputs are latched on the rising edge of Write
Enable.
CL
Input
The Command Latch Enable activates the latching of the
command inputs in the command interface. When CL is
High, the inputs are latched on the rising edge of Write
Enable.
E
Input
The Chip Enable input activates the memory control logic,
input buffers, decoders and read circuitry. When Chip
Enable is Low, VIL, the device is selected.
If Chip Enable goes High (VIH) while the device is busy
programming or erasing, the device remains selected and
does not go into standby mode.
While the device is busy reading:
– the Chip Enable input should be held Low during the
whole busy time (tBLBH1) for devices that do not feature
the Chip Enable don’t care option. Otherwise, the read
operation in progress is interrupted and the device goes
into standby mode.
– for devices that feature the Chip Enable don’t care
option, the Chip Enable going High during the busy time
(tBLBH1) will not interrupt the read operation and the
device will not go into standby mode.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| NAND512W3A2SN6F | 制造商:Micron Technology Inc 功能描述:512MB NAND FLASH 制造商:Micron Technology Inc 功能描述:NAND - Tape and Reel |
| NAND512W3A2SZA6E | 制造商:Micron Technology Inc 功能描述:SLC NAND Flash Parallel 3V/3.3V 512Mbit 64M x 8bit 12us 63-Pin VFBGA Tray 制造商:Micron Technology Inc 功能描述:NAND - Trays 制造商:Micron Technology Inc 功能描述:MICNAND512W3A2SZA6E 512MB NAND FLASH 制造商:Micron Technology 功能描述:SLC NAND Flash Parallel 3V/3.3V 512Mbit 64M x 8bit 12us 63-Pin VFBGA Tray |
| NAND512W3A2SZA6F | 制造商:Micron Technology Inc 功能描述:SLC NAND Flash Parallel 3V/3.3V 512Mbit 64M x 8bit 12us 63-Pin VFBGA T/R 制造商:Micron Technology Inc 功能描述:NAND - Tape and Reel 制造商:Micron Technology 功能描述:SLC NAND Flash Parallel 3V/3.3V 512Mbit 64M x 8bit 12us 63-Pin VFBGA T/R |
| NAND512W4A0AN6E | 功能描述:闪存 NAND & S.MEDIA FLASH RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| NAND512W4A0AZA6E | 制造商:Micron Technology Inc 功能描述:FLASH PARALLEL 3V/3.3V 512MBIT 32MX16 12US 63VFBGA - Trays |
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