参数资料
型号: PIC18F45J50-I/ML
厂商: Microchip Technology
文件页数: 120/164页
文件大小: 0K
描述: IC PIC MCU FLASH 32K 2V 44-QFN
产品培训模块: XLP Deep Sleep Mode
PIC18 J Series MCU Overview
8-bit PIC® Microcontroller Portfolio
标准包装: 45
系列: PIC® XLP™ 18F
核心处理器: PIC
芯体尺寸: 8-位
速度: 48MHz
连通性: I²C,SPI,UART/USART,USB
外围设备: 欠压检测/复位,DMA,POR,PWM,WDT
输入/输出数: 34
程序存储器容量: 32KB(16K x 16)
程序存储器类型: 闪存
RAM 容量: 3.8K x 8
电压 - 电源 (Vcc/Vdd): 2.15 V ~ 3.6 V
数据转换器: A/D 13x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 44-VQFN 裸露焊盘
包装: 管件
产品目录页面: 657 (CN2011-ZH PDF)
配用: AC164322-ND - MODULE SOCKET MPLAB PM3 28/44QFN
2011 Microchip Technology Inc.
DS39931D-page 59
PIC18F46J50 FAMILY
REGISTER 4-5:
DSWAKEH: DEEP SLEEP WAKE HIGH BYTE REGISTER (BANKED F4Bh)
U-0
R/W-0
—DSINT0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-1
Unimplemented:
Read as ‘0’
bit 0
DSINT0:
Interrupt-on-Change bit
1
= Interrupt-on-change was asserted during Deep Sleep
0
= Interrupt-on-change was not asserted during Deep Sleep
REGISTER 4-6:
DSWAKEL: DEEP SLEEP WAKE LOW BYTE REGISTER (BANKED F4Ah)
R/W-0
U-0
R/W-0
U-0
R/W-1
DSFLT
DSULP
DSWDT
DSRTC
DSMCLR
DSPOR
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
DSFLT:
Deep Sleep Fault Detected bit
1
= A Deep Sleep Fault was detected during Deep Sleep
0
= A Deep Sleep Fault was not detected during Deep Sleep
bit 6
Unimplemented:
Read as ‘0’
bit 5
DSULP:
Ultra Low-Power Wake-up Status bit
1
= An Ultra Low-Power Wake-up event occurred during Deep Sleep
0
= An Ultra Low-Power Wake-up event did not occur during Deep Sleep
bit 4
DSWDT:
Deep Sleep Watchdog Timer Time-out bit
1
= The Deep Sleep Watchdog Timer timed out during Deep Sleep
0
= The Deep Sleep Watchdog Timer did not time out during Deep Sleep
bit 3
DSRTC:
Real-Time Clock and Calendar Alarm bit
1
= The Real-Time Clock/Calendar triggered an alarm during Deep Sleep
0
= The Real-Time Clock /Calendar did not trigger an alarm during Deep Sleep
bit 2
DSMCLR:
MCLR Event bit
1
= The MCLR pin was asserted during Deep Sleep
0
= The MCLR pin was not asserted during Deep Sleep
bit 1
Unimplemented:
Read as ‘0’
bit 0
DSPOR:
Power-on Reset Event bit
1
= The VDD supply POR circuit was active and a POR event was detected(1)
0
= The VDD supply POR circuit was not active, or was active, but did not detect a POR event
Note 1:
Unlike the other bits in this register, this bit can be set outside of Deep Sleep.
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