参数资料
型号: PM4314
厂商: PMC-SIERRA INC
元件分类: 数字传输电路
英文描述: QUAD T1/E1 LINE INTERFACE DEVICE
中文描述: DATACOM, PCM TRANSCEIVER, PQFP128
封装: 14 X 20 MM, PLASTIC, QFP-128
文件页数: 89/170页
文件大小: 823K
代理商: PM4314
PM4314 QDSX
DATA SHEET
PMC-950857
ISSUE 5
QUAD T1/E1 LINE INTERFACE DEVICE
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
77
Registers 012H, 052H, 092H and 0D2H: CDRC Interrupt Status
Bit
Type
Function
Default
Bit 7
R
LCVI
X
Bit 6
R
LOSI
X
Bit 5
R
LCSDI
X
Bit 4
R
EXZI
X
Bit 3
Unused
X
Bit 2
Unused
X
Bit 1
Unused
X
Bit 0
R
LOS
X
The bit positions LCVI, LOSI, LCSDI and EXZI of this register indicate which of
the status events generated an interrupt. A logic 1 in these bit positions indicate
that the corresponding event was detected; a logic 0 in these bit positions
indicate that no corresponding event has been detected. The bit positions LCVI,
LCSDI and EXZI are set on the assertion of a line code violation, a line code
signature detection, and excessive zeros detection, respectively. LOSI is set on
a change of state of the LOS alarm. Bits LCVI, LOSI, LCSDI and EXZI are
cleared by reading this register. The current state of the LOS alarm can be
determined by reading bit 0 of this register.
Note:
In the CDRC, excess zeros is defined as a string greater than: 3 consecutive
zeros for E1 data, or 7 consecutive zeros for T1 data.
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