R8C/38T-A Group
7. Voltage Detection Circuit
Under development Preliminary document
Specifications in this document are tentative and subject to change.
R01UH0241EJ0010 Rev.0.10
Page 72 of 730
Aug 05, 2011
Figure 7.6
Example of Voltage Monitor 1 Interrupt Operation
Vdet1
VW1C3
VCC
1.8 V
(1)
Digital filter
sampling clock
2 cycles
VW1C2
When VW1C1 bit is 1
(digital filter disabled),
VCAC1 bit is 0
(one edge),
and
VW1C7 bit is 0
(VCC reaches Vdet1 or above)
Set to 0 by acknowledgement of
an interrupt request
Digital filter
sampling clock
2 cycles
Set to 0 by a program
Voltage monitor 1 interrupt
request
Voltage monitor 1 interrupt
request
Set to 0 by acknowledgement
of an interrupt request
VW1C2
Voltage monitor 1 interrupt
request
When VW1C1 bit is 0
(digital filter enabled)
and
VCAC1 bit is 1 (both edges)
VW1C2
Set to 0 by acknowledgement
of an interrupt request
Set to 0 by a program
Voltage monitor 1 interrupt
request
When VW1C1 bit is 0
(digital filter enabled),
VCAC1 bit is 0
(one edge),
and
VW1C7 bit is 0
(VCC reaches Vdet1 or above)
VW1C2
Set to 0 by
acknowledgement of an
interrupt request
Voltage monitor 1 interrupt
request
When VW1C1 bit is 0
(digital filter enabled),
VCAC1 bit is 0
(one edge),
and
VW1C7 bit is 1
(VCC reaches Vdet1 or below)
Set to 0 by a program
VW1C2
Voltage monitor 1 interrupt
request
When VW1C1 bit is 1
(digital filter disabled)
and
VCAC1 bit is 1 (both edges)
Set to 0 by a program
Set to 0 by acknowledgement
of an interrupt request
Set to 0 by a program
Set to 0 by acknowledgement
of an interrupt request
Set to 0 by a program
When VW1C1 bit is 1
(digital filter disabled),
VCAC1 bit is 0
(one edge),
and
VW1C7 bit is 1
(VCC reaches Vdet1 or below)
VW1C1 to VW1C3, VW1C7: Bits in VW1C register
VCAC1: Bit in VCAC register
The above diagram applies under the following conditions:
VCA26 bit in VCA2 register = 1 (voltage detection 1 circuit enabled)
VW1C0 bit in VW1C register = 1 (voltage detection 1 interrupt enabled)
Note:
1. If voltage monitor 0 reset is not used, VCC must be at least 1.8 V.