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参数资料
型号： S1R72803F00A100
元件分类： 微控制器/微处理器
英文描述： 1 CHANNEL(S), 400M bps, SERIAL COMM CONTROLLER, PQFP100
封装： 0.40 MM PITCH, PLASTIC, QFP20-184
文件页数： 97/115页
文件大小： 833K
代理商： S1R72803F00A100
S1R72803F00A
78
EPSON
Bus Reset ORB Pointer Register
This Bus Reset Header Pointer Register holds the value of a PostRxORBPtr when a bus reset occurs. When
several bus resets occur, it is updated to the latest PostRxORBPtr. This register is read-only and writing to this
register is ignored.
Address Register Name
Bit Symbol
R/W
Description
H.Rst S.Rst B.Rst
0x5A
BRstORBPtr_H
7:
Write is ignore
6:
Read is always zero
5:
4: BusRstORBPtr[12]
0x00
–
3: BusRstORBPtr[11]
2: BusRstORBPtr[10]
1: BusRstORBPtr[9]
0: BusRstORBPtr[8]
Bus Reset ORB-Data Area Pointer
0x5B
BRstORBPtr_L
7: BusRstORBPtr[7]
R
This register indicates Address
6: BusRstORBPtr[6]
in Rx ORB Data Area
5: BusRstORBPtr[5]
when BusRest detected.
4: BusRstORBPtr[4]
0x00
–
3: BusRstORBPtr[3]
2: BusRstORBPtr[2]
1:
Write is ignore
0:
Read is always zero
Address Register Name
Bit Symbol
R/W
Description
H.Rst S.Rst B.Rst
0x5E
MaintCtl_H
7: E_Hcrc
R/W
0:
1: Add Header CRC Error
6: E_Dcrc
R/W
0:
1: Add Data CRC Error
5: No_Pkt
R/W
0:
1: No Transmit Next Packet
4: F_Ack
R/W
0:
1: Tx Optional AckCode
0x00
–
3: N_ack
R/W
0:
1: No Transmit AckPacket
2:
0:
1:
0:
1:
0:
1:
Maintenance Control Register
This Maintenance Control Register enables intentional generation of a serial bus error.
Bit7 Error Header CRC
Writing “1” to this bit sets an invalid value for the Header CRC of a transmit packet to be generated next.
After transmitting it, this bit is cleared to “0”.
Bit6 Error Data CRC
Writing “1” to this bit sets an invalid value for the Data CRC of a transmit packet to be generated next.
After transmitting it, this bit is cleared to “0”.
Bit5 No Packet
Writing “1” to this bit abandons a transmit packet to be generated next. Immediately after abandoning it, this
bit is cleared.
Bit4 F_Ack
Writing “1” to this bit transmits the value in the MainCtl(Lo).Ack Register to the ACK packet to be generated
next. Immediately after transmitting it, this bit is cleared to “0”.
Bit3 No_Ack
Writing “1” to this bit abandons the ACK packet to be generated next without transmitting it. Immediately after
abandoning it, this bit is cleared to “0”.
Bit2..0 Reserved
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